MSU Standard Cell Library
MSU Standard Cell Library For 2 / 3 Level Metal
The new MSU standard cell library supports both two level and three
level metal IC layout designs. It is available in three technologies 2U, 1.2U,
and 0.8U. More information on the cell library
here .
This library is in its stage of completion. But additions and modifications
may be expected. New cells will be added to the library as and when they
are designed.
What's new in the cell library ?
A
comparison
between ITD dlmV3.0 Magic layouts and the new MSU standard cell
library Led layouts.
Following is the list of cell groups available in the library.
AND OR GATES
OR AND GATES
AND/NAND GATES
OR/NOR GATES
BUFFERS
TWO PHASE GATES
DELAY GATE
D FLIP FLOPS
ADDERS
INVERTERS
LATCHES
D-LATCHES
REFERENCE
SELECT
LINEAR
SCAN LATCH
SWITCHES
T FLIP FLOPS
XOR/X-NOR GATES
LVIO CELLS (Documentation in process)
- Bit_Reg
- Bit_Reg1
- Clock_gen
- Delay
- Ex_Or
- Latch_Comp
- Out_Reg
- Por
- Status_Latch
- Test_Latch
- dlat
- johnbit
- johnbit0
- mode
- switch