Microsystems Prototyping Laboratory

orf401: 4 INPUT OR

• Gate Level Schematic
• Transistor Level Schematic
• Layout
• Logic Equation
• Inputs
• Outputs
• Truth Table
• Terminal Location and Capacitance
• Characterization Data

here.

---------------------------------
A	B	C	D	O
---------------------------------
0	0	0	0	0
x	x	x	1	1
x	x	1	x	1
x	1	x	x	1
1	x	x	x	1
---------------------------------

--------------------------------------------
Name	X_loc	Y_loc	   Capacitance (fF)
	lambda  lambda   2U	1.2U	0.8U
--------------------------------------------
A1	7	19	78.2	37.6	31.6
B1	32	22	71.0	35.2	29.9
C1	78	19	69.9	34.9	29.7
D1	63	19	70.9	35.2	30.0
O	51	18	-	-	-
--------------------------------------------

• Delay Information