Microsystems Prototyping Laboratory

norf251: A NOR B

• Gate Level Schematic
• Transistor Level Schematic
• Layout
• Logic Equation
• Inputs
• Outputs
• Truth Table
• Terminal Location and Capacitance
• Characterization Data

here.

-----------------
A	B	O
-----------------
0	0	0
0	1	1
1	0	0
1	1	0
-----------------

--------------------------------------------
Name	X_loc	Y_loc	   Capacitance (fF)
	lambda  lambda   2U	1.2U	0.8U
--------------------------------------------
A1	37.05	18.5	65.7	33.3	28.1
B2	12	26	33.0	15.1	14.0
O	20	30	-	-	-
--------------------------------------------

• Delay Information