Microsystems Prototyping Laboratory

norf401: 4 INPUT NOR

• Gate Level Schematic
• Transistor Level Schematic
• Layout
• Logic Equation
• Inputs
• Outputs
• Truth Table
• Terminal Location and Capacitance
• Characterization Data

here.

---------------------------------
A	B	C	D	O
---------------------------------
0	0	0	0	1
x	x	x	1	0
x	x	1	x	0
x	1	x	x	0
1	x	x	x	0
---------------------------------

--------------------------------------------
Name	X_loc	Y_loc	   Capacitance (fF)
	lambda  lambda   2U	1.2U	0.8U
--------------------------------------------
A1	6	19	57.1	27.7	19.7
B1	20	36	61.2	29.5	20.3
C1	46	18	58.7	28.5	19.8
D1	73	20	60.4	29.1	20.3
O	83.5	36	-	-	-
--------------------------------------------

• Delay Information