Microsystems Prototyping Laboratory

muxf201: DATA SELECT

• Gate Level Schematic
• Transistor Level Schematic
• Layout
• Logic Equation
• Inputs
• Outputs
• Truth Table
• Terminal Location and Capacitance
• Characterization Data

here.

------------------------------
SEL3	A1	B2	O
------------------------------
0	x	0	0
0	x	1	1
1	0	x	0
1	1	x	1
x	0	0	0
x	1	1	1
------------------------------

--------------------------------------------
Name	X_loc	Y_loc	   Capacitance (fF)
	lambda  lambda   2U	1.2U	0.8U
--------------------------------------------
A1	11	32	70.0	35.1	30.1
B2	80	21	74.0	37.1	31.5
O	94	29	-	-	-
SEL3	20	32	63.6	28.7	27.0
--------------------------------------------

• Delay Information