Microsystems Prototyping Laboratory


dfrf311: D-FF W / RST, Q, & Q_b


Gate Level Schematic of the standard cell "dfrf311".


Schematic of the standard cell "dfrf311" with device sizes in lambda.


Layout of the standard cell "dfrf311"

here.


Logic Equation: Q = [(Qn-1 * CLK2) + (DATA1n-1 * CLK2')] * RST3

Q_b = Qn'


Input(s): CLK2, DATA1, RST3


Output(s): Q, Q_b


Truth Table

------------------------------------------
CLK	DATA	RST	Q	Q_b
------------------------------------------
l2h	x	1	Qn-1	Qn-1'
h2l	x	1	DATA	DATA'
x	x	0	0	1
------------------------------------------


Terminal Location and Capacitance Table

--------------------------------------------
Name	X_loc	Y_loc	   Capacitance (fF)
	lambda  lambda   2U	1.2U	0.8U
--------------------------------------------
CLK2	11.5	24	62.8	28.9	18.9
DATA1	49	39	58.6	28.8	18.5
Q	212	31.5	-	-	-
Q_b	236	17	-	-	-
RST3	123	20	89.5	38.8	22.9
--------------------------------------------


Characterization Data