Microsystems Prototyping Laboratory

norf211: 2 INPUT OR / NOR

• Gate Level Schematic
• Transistor Level Schematic
• Layout
• Logic Equation
• Inputs
• Outputs
• Truth Table
• Terminal Location and Capacitance
• Characterization Data

here.

---------------------------
A	B	O1	O2
---------------------------
0	0	0	1
x	1	1	0
1	x	1	0
---------------------------

--------------------------------------------
Name	X_loc	Y_loc	   Capacitance (fF)
	lambda  lambda   2U	1.2U	0.8U
--------------------------------------------
A1	31	20	68.0	34.3	29.2
B1	12	24	79.5	38.3	31.9
O1	56.2	28.15	-	-	-
O2	41.5	30	-	-	-
--------------------------------------------

• Delay Information