Scripting

Application Programming Interface Functions for Tcl


The following functions are part of the Quartus® II software Application Programming Interface (API). You can use these functions as Tcl commands. Click the function name to see the syntax for and a description of the function.

This list contains the following sections:

 

Project Control Functions

Project (project) Functions

project add_assignment
project add_default_parameter
project add_parameter
project archive
project close
project end_batch
project cmp_exists
project create
project create_cmp
project create_sim
project create_swb
project exists
project generate_tcl_file
project get_active_cmp_name
project get_active_sim_name
project get_active_swb_name
project get_all_assignments
project get_all_default_parameters
project get_all_parameters
project get_assignment_count
project get_assignment_value
project get_current_project_name
project get_default_parameter_value
project get_parameter_value
project open
project remove_assignment
project remove_default_parameter
project remove_parameter
project restore
project set_active_cmp
project set_active_sim
project set_active_swb
project sim_exists
project swb_exists
project start_batch

Compiler (cmp) Functions

cmp add_assignment
cmp end_batch
cmp full_back_annotate
cmp get_locations
cmp get_all_assignments
cmp get_assignment_count
cmp get_assignment_value
cmp get_report_data
cmp get_selected_nodes
cmp last_compilation_successful
cmp locate
cmp locate_to_current_assignment_floorplan
cmp locate_to_floorplan
cmp locate_to_text
cmp is_running
cmp purge_compiler_results
cmp remove_assignment
cmp start
cmp start_batch
cmp stop
cmp write_output_netlists
cmp write_routing_constraints

Timing Analysis (cmp) Functions

cmp find_period
cmp find_tco
cmp find_th
cmp find_tsu
cmp get_clock_delay_path
cmp get_delays_from_clocks
cmp get_delays_from_keepers
cmp get_delay_path
cmp get_timing_node_info
cmp get_timing_nodes

LogicLock (cmp) Functions

cmp logiclock_back_annotate
cmp logiclock_export
cmp logiclock_import
cmp logiclock_list_nodes

Simulator (sim) Functions

sim add_assignment
sim end_batch
sim force_value
sim get_all_assignments
sim get_assignment_count
sim get_assignment_value
sim get_memory_depth
sim get_memory_width
sim get_time
sim get_value
sim initialize
sim is_initialized
sim is_running
sim print
sim read_from_memory
sim release_value
sim remove_assignment
sim run
sim start
sim start_batch
sim stop
sim testbench_mode
sim write_to_memory

Software Build (swb) Functions

swb add_assignment
swb get_all_assignments
swb get_assignment_count
swb get_assignment_value
swb is_running
swb purge_intermediate_files
swb remove_assignment
swb start
swb stop

System-level Debugging (sld) Functions

sld close_session
sld enable_trigger
sld open_session
sld run
sld stop
sld run_multiple_start
sld run_multiple_end

Device Database (device) Functions

device get_device_count
device get_device_name_by_index
device get_device_resource_count
device get_estimated_timing
device get_family_count
device get_family_name_by_index
device get_timing

Source Code Control (scc) Functions

scc diff
scc file_exists
scc file_locked
scc file_up_to_date
scc get_file
scc lock_file
scc log
scc put_file
scc unlock_file

Global Functions

exit
get_ini_value
get_version
help
init_tk
is_command_line_mode
ls
set_ini_value
show_message

Synopsys Design Constraints Functions

create_clock
create_generated_clock
get_clocks
get_ports
remove_clock
remove_input_delay
remove_output_delay
reset_path
set_clock_latency
set_false path
set_input_delay
set_max_delay
set_min_delay
set_multicycle path
set_output_delay
set_propagated_clock


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