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The following table provides information about the ARM®-based Excalibur™ family of embedded processor programmable logic devices.
ARM-based Excalibur devices are in-circuit reconfigurable (ICR) through an external configuration device. All ARM-based Excalibur devices provide JTAG BST circuitry.
| Device Note (1) | Package Note (2) | Temp. Note (3) | Speed Grade Note (4) | ESBs | Logic Elements | Flipflops | Memory Bits | Macrocells | Ded. Inputs | Ded. Fast I/O Pins | Ded. Excalibur I/O Pins | I/O Note (11) | Configuration Device |
| EPXA1 | 484F 672F |
C | 1, 2, 3 | 26 | 4,160 | 4,398 | 53,248 | 416 | 4 | 4 | 106, 126 |
178, 238 |
EPC2, EPC4, EPC8, or EPC16 |
| EPXA4 | 672F 1020F |
C, I Note (7) | 1, 2, 3 | 104 | 16,640 | 17,128 | 212,992 | 1,664 | 4 | 4 | 37, 37 |
418, 480 |
EPC2, EPC4, EPC8, or EPC16 |
| EPXA10 | 1020F | C | 1, 2, 3 | 160 | 38,400 | 39,103 | 327,680 | 2,560 | 4 | 4 | 3 | 703 | EPC2, EPC4, EPC8, or EPC16 |
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