An Altera^® device family that is based on system-on-a-programmable-chip (SOPC) architecture, consisting of an Excalibur^™ embedded processor stripe and an APEX^™ 20KE programmable logic device. The stripe contains the ARM^® processor core, peripherals, and a memory subsystem. This architecture allows the stripe and programmable logic device to be optimized for performance, enabling maximum integration and system cost reductions.

The ARM^®-based Excalibur family includes the EPXA1, EPXA4, and EPXA10 devices.