See Also

The Import LogicLock^™ Regions and Export LogicLock Regions commands allow you to optimize entities individually using LogicLock region assignments and preserve your optimization when you instantiate those entities in a larger design.

In addition to LogicLock region assignments, you can import and export all Entity Settings File (.esf) assignments, as well as I/O standard assignments.

Importing Assignments

When you import LogicLock region assignments, the Quartus^® II software traverses the compilation hierarchy starting at the current compilation focus. For each entity beneath the current focus, it checks if there is an Entity Settings File (.esf) in the current project directory. If there is, the Quartus II software imports the assignments from this ESF into the top-level ESF for the current compilation hierarchy. You can direct the Quartus II software to import an entity's assignments from a file other than the entity's ESF by specifying the LogicLock Import File Name logic option for the entity.

If the current project contains multiple instances of a lower-level entity, the Quartus II software instantiates the assignments imported for that lower-level entity once for each instance. For example, if a design contains two instances of a lower-level entity with a LogicLock region assignment in its ESF, the Quartus II software instantiates two LogicLock regions with unique names, one for each instance. The name of an imported region is created by appending the instance name to the name of the LogicLock region in the ESF. However, if the created name is the same as the name of a region that already exists in the project, the Quartus II software does not overwrite the existing region's assignments.

To prevent placement conflicts, the Quartus II software assigns imported top-level LogicLock regions floating locations. However, it preserves the location of imported child regions relative to their parents.

To import successfully, you must have performed analysis and elaboration on the current compilation focus.

Updating a Previously Imported LogicLock Region by Reimporting Its Assignments

When you select a previously imported LogicLock region in the LogicLock Regions window and use the Import LogicLock Regions command to update the region's assignments, the Quartus II software reimports assignments for that region from the ESF that is the source for the import. In order to update a previously imported LogicLock region successfully, you must not have renamed the region after importing it.

The update operation overwrites the region's current size and location with the size and location specified in the source ESF. If there are nodes or entities assigned to the region in the source ESF that are not currently assigned to the region, the update operation adds these assignments to the current assignments for the region. The update operation does not remove any nodes or entities from the region.

If the source ESF contains back-annotated node location assignments for the region, the update operation adds these assignments to the current assignments for the region, overwriting any existing back-annotated node location assignments.

The update operation does not change the region's position in the hierarchy of LogicLock regions.

Because the update operation overwrites the region's size and location but not its position in the hierarchy, the update operation may create illegal LogicLock region assignments if the size and location imported from the source ESF cause the region to exceed the boundaries of its parent LogicLock region.

Exporting Assignments

When you export LogicLock region assignments, the Quartus II software writes all LogicLock region assignments, other ESF assignments, and I/O standard assignments that apply to the entity instance that you specify in the Export focus full hierarchy path box to the ESF that you specify in the in the File name box.

To make it easier to import the assignments into another project, you should specify a file name that is the same as the name of the entity to which the assignments should apply when they are imported. If you specify a different file name when you export the assignments, you will need to specify the LogicLock Import File Name logic option for the entity when you import the assignments.

If you want to export node-level assignments (for example, LogicLock node back-annotation), you must ensure that node names do not change when the entity is synthesized in a new project. You can do so by saving synthesis results for the entity as an ATOM-based netlist in Verilog Quartus^® Mapping File (.vqm) format and using the VQM File instead of your original design files when you instantiate the entity in the new design. EDIF Input Files (.edf) and VQM Files generated by third-party EDA synthesis tools are ATOM-based netlists. If you are compiling from EDIF Input Files or VQM Files, you do not need to save Quartus synthesis results when exporting node-level assignments.

To export successfully, you must have performed analysis and elaboration on the current compilation focus.

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