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To use the bus functional model to simulate an ARM^®-based Excalibur^™ design, you must first create the bus functional model simulation files. The bus functional model simulation files are used to describe both the bus transactions between the Excalibur embedded processor stripe and the PLD over the Stripe-to-PLD and PLD-to-Stripe Bridges during simulation, and the initial size, location, and content of the memory banks in the stripe.

To create the bus functional model simulation files:

1. Create a bus transaction input file named input.dat that describes the bus transactions that are initiated by the embedded processor core and directed to the PLD over the Stripe-to-PLD Bridge via the Stripe Master-Port. Guidelines

2. Use the exc_bus_translate utility to generate the mastercommands.dat file that can be used by the bus functional model to simulate bus transactions, by typing the following command at the command prompt:

   exc_bus_translate <disk drive>:\<project directory>\input.dat <disk drive>:\<project directory>\mastercommands.dat 

3. If you want, create the slavememory.cfg.dat file, which specifies the start and end addresses and number of wait states for the six memory banks in the stripe. Guidelines

4. If you want, create the appropriate slavememory.<bank number>.dat file(s), which contains the initial contents of the corresponding memory bank in the stripe. Guidelines

Make sure all the files are placed in the \<project directory>\<EDA simulation tool>\simulation directory.

5. Perform a functional simulation or a timing simulation with the ModelSim^® software.

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