The portion of an ARM^®-based Excalibur^™ device that contains an ARM^® embedded processor core, peripherals, and a memory subsystem that contains single-port and dual-port memory. The stripe interfaces with the programmable logic device (PLD) portion of the device.

Peripherals in the stripe include the SDRAM controller, ETM9^™ embedded trace module, interrupt controller, universal asynchronous receiver/transmitter (UART), watchdog timer, reset module, PLLs, configuration logic timer, PLD-To-Stripe Bridge via the Stripe Slave Port, Stripe-To-PLD Bridge via the Stripe Master Port, and Expansion Bus Interface (EBI).

For more information on the Excalibur embedded processor stripe, refer to the Excalibur ARM-Based Embedded Processor PLDs Data Sheet, which is available from the Literature section of the Altera^® web site.

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