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Lists the default or user-entered timing settings specified in the pages under Timing Settings in the Settings dialog box and/or the Assignment Organizer command (Assignments menu) for the current project. The Timing Settings section lists the name, value, and assignment file of each timing setting. The Timing Settings section also lists the source and destination names associated with individual timing assignments, where applicable. The Timing Settings section may include the following possible timing settings:
| Setting Name (Timing Settings Section) | Option Name (Location) | Setting |
|---|---|---|
| Include external delays in the fmax calculations | Include external delays to and from device pins in fmax calculations (Clocks page) | On | Off |
| Ignore all user clock settings | Default required fmax (Clocks page) | On | Off |
| tsu Requirement | tsu (Other Requirements & Options page) | <tSU requirement value> |
| th Requirement | th (Other Requirements & Options page) | <tH requirement value> |
| tco Requirement | tco (Other Requirements & Options page) | <tCO requirement value> |
| tpd Requirement | tpd (Other Requirements & Options page) | <tPD requirement value> |
| Default Multicycle Hold | NA | <default multicycle hold value> |
| Cut off feedback from I/O pins | Cut off feedback from I/O pins (Other Requirements & Options page) | On | Off |
| Cut off clear and preset signal paths | Cut off clear and preset signal paths (Other Requirements & Options page) | On | Off |
| Cut off read during write signal paths | Cut off read during write signal paths (Other Requirements & Options page) | On | Off |
| Cut paths between unrelated clock domains | Cut paths between unrelated clock domains (Clocks page) | On | Off |
| Maximum fmax to report | Exclude paths with fmax greater than (Timing Analysis Reporting page) | <fMAX value> |
| Sources to report per destination | Show <n> source nodes per destination node (Timing Analysis Reporting page) | <source value> |
| Maximum strongly connected component loop size | NA | <loop value> |
| External input delay | Default external input delay (Default External Delays dialog box) | <external input delay value> |
| External output delay | Default external output delay (Default External Delays dialog box) | <external output delay value> |
| FMAX_REQUIREMENT | Default required fmax (Clocks page) | <fMAX requirement value> |
| Maximum slack to report | Exclude paths with slack greater than (Timing Analysis Reporting page) | <slack value> |
| Minimum tsu to report | Exclude paths with tsu less than (Timing Analysis Reporting page) | <tSU value> |
| Minimum th to report | Exclude paths with th less than (Timing Analysis Reporting page) | <tH value> |
| Minimum tco to report | Exclude paths with tco less than (Timing Analysis Reporting page) | <tCO value> |
| Minimum tpd to report | Exclude paths with tpd less than (Timing Analysis Reporting tab) | <tPD value> |
| Clock Settings | Clock Settings (Assignment Organizer) | <clock settings name> |
| Cut Timing Path | Cut Timing Path (Assignment Organizer) | On | Off |
| Multicycle Hold | Multicycle Hold (Assignment Organizer) | <Multicycle Hold requirement> |
| Inverted Clock | Inverted Clock (Assignment Organizer) | On | Off |
| Minimum Delay Requirement | Minimum Delay Requirement (Assignment Organizer) | <Minimum tPD requirement> |
| Multicycle | Multicycle (Assignment Organizer) | <Multicycle value> |
| Not a Clock | Not a Clock (Assignment Organizer) | On | Off |
| Source Multicycle Hold | Source Multicycle Hold (Assignment Organizer) | <Source Multicycle Hold value> |
| Source Multicycle | Source Multicycle Hold (Assignment Organizer) | <Source Multicycle value> |
The following example shows the Timing Settings section generated for a sample design:
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- PLDWorld - |
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