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After you have set up the project, you set up the Model Technology ModelSim® software to perform functional co-simulation of a ARM®-based Excalibur Verilog or VHDL design with an instantiation of alt_exc_stripe with the ModelSim software by using the Excalibur Stripe Simulator (ESS) model and connecting to a software debugger.
You can use the ESS model to simulate Verilog designs with the ModelSim PE/SE (non-OEM) and ModelSim-Altera® (OEM) software, and simulate VHDL designs with the ModelSim SE software. The ESS model can be targeted from the AXD, ADW, Mentor Graphics® XRAY, and GNUPro arm-elf-gdb software debuggers on PCs, and the GNUPro arm-elf-gdb debugger on Solaris workstations. |
To connect to the debugger and load the design:
If you have not already done so, perform 1. Set Up the Project with the ModelSim Software for Use with the ESS Model.
To enable communication between the ModelSim software and the AXD and GDB software debugger:
Choose Execute Macro (Tools menu). The Execute Do File dialog box appears.
Select the alteradebugger.do macro file, which is located in the \<Quartus® II installation directory>\eda\sim_lib\excalibur\ess_hdl directory.
Click Open.
To load the design:
Choose Simulate (Simulate menu). The Simulate dialog box appears.
In the Name list, click the + icon to expand the work directory.
Select the top-level design file or test bench file to simulate.
Click Add.
Click Load.
To begin the functional simulation in the ModelSim software, type run -all
at the ModelSim prompt. The ModelSim software waits for a connection from the debugger through TCP port 9998.
To continue with the ModelSim ESS simulation flow, proceed to 4. Perform a Functional Co-Simulation with the ESS Model, ModelSim Software, and AXD Debugger or 5. Perform a Functional Co-Simulation with the ESS Model, ModelSim Software, and GDB Debugger
- PLDWorld - |
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