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1.0 Executive Summary

• 1.1 SAR Benchmark Summary
• 1.2 RASSP Process
  • 1.2.1 System Design
  • 1.2.2 Architecture Design
  • 1.2.3 Detail Design
  • 1.2.4 Integration and Test

2.0 SAR Problem Overview

• 2.1 SAR System
• 2.2 SAR Processing Algorithms
• 2.3 Form Factor Contraints
• 2.4 Accuracy
• 2.5 Latency
• 2.6 Data Interfaces
• 2.7 Control and Diagnostic Interface
• 2.8 Summary

3.0 System Design

• 3.1 System Process Description
  • 3.1.1 RASSP Innovations in the System Design Process
• 3.2 System Requirements Analysis
  • 3.2.1 Executable Specification
• 3.3 Functional Analysis
• 3.4 System Partitioning
• 3.5 Lessons Learned in the System Design of the SAR Benchmark
  • 3.5.1 Executable Specification
  • 3.5.2 System Tools

4.0 Architecture Design

• 4.1 Architecture Process Descripion
  • 4.1.1 RASSP Innovations in the Architecture Design Process
• 4.2 Functional Design
  • 4.2.1 Architecture Sizing of SAR Algorithm
  • 4.2.2 Flow Graph Generation
  • 4.2.3 Develop Command Program
• 4.3 Architecture Selection
  • 4.3.1 Initial Size, Weight and Power
  • 4.3.2 Architecture Definition
  • 4.3.3 Performance Modeling
  • 4.3.4 Architecture Trade-off Analysis
• 4.4 Architecture Verification
  • 4.4.1 Abstract Behavior Simulation
  • 4.4.2 Autocode Generation
• 4.5 Lessons Learned In the Architecture Design of the SAR Benchmark
  • 4.5.1 Hierarchical Simulation (Performance Modeling)
  • 4.5.2 Hierarchical Simulation (Abstract Behavior)
  • 4.5.3 Autocoding Software

5.0 Detailed Design

• 5.1 Detailed Design Process Description
  • 5.1.1 RASSP Innovations in the Detailed Design Process
• 5.2 DATA I/O Module Design Process
  • 5.2.1 Detailed Behavioral/RTL Modeling
  • 5.2.2 Detailed Board Design Process
  • 5.2.3 FPGA Design Process
  • 5.2.4 Fabricate and Assemble Data I/O Module
• 5.3 Lessons Learned in Detailed Design

6.0 Integration and Test

• 6.1 Integration and Test Process Description
• 6.2 Integration and Test
• 6.3 Document Update
• 6.4 Acceptance Test
• 6.5 Lessons Learned in Integration and Test
  • 6.5.1Virtual Prototype
  • 6.5.2 Design for Testability
  • 6.5.3 Test and Integration Environment

7.0 Conclusions

8.0 Acronym List

9.0 Glossary

10.0 References

• 10.1 Application Notes
• 10.2 Articles / Presentations

A     Appendix

• A.1 Introduction to Data-Flow Methodology
  • A.1.1 Control Driven Versus Data Driven Computing
  • A.1.2 Data Flow Design
• A.2 Autocoding the Synthetic Aperture Radar (SAR) Using GEDAE™
  • A.2.1 Building the SAR Application
  • A.2.2 Running the Graph
  • A.2.3 Distributing or Embedding the Graph

Next: 1 Executive Summary Up: Case Studies Index Previous:Case Study SAR Index