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SAR Case Study

8.0 Acronym List

A/D Analog-to-Digital Converter
ADA Programming Language
ADTS Advanced Detection Technology Sensor
AG Application Generator
ASIC Application-Specific Integrated Circuit
ATL Advanced Technology Laboratories
BTD Benchmark Technical Description
CAD Computer-Aided Development
CE Compute Element
CIDS Configuration Item Development Specification
COTS Commercial, Off-The-Shelf
CP Command Program
CSIM Lockheed Martin Internally-Developed Simulator
DARPA Defense Advanced Research Projects Agency
dB Decibel
DFG Data-Flow Graph
DSP Digital Signal Processor
EAG Equivalent Application Graph
EDIF Electronic Data Interchange Format
EPROM Electrically Programmable Read Only Memory
FFT Fast Fourier Transform
FIFO First In, First Out
FIR Finite Impulse Response Filter
FO Fiber-Optic
FPGA Field-Programmable Gate Array
GEDAE™ Graphical Entry, Distributed Applications Environment
GFLOP Billion Floating-Point Operations per Second
GRAIL Graph Translator
GRED Graphical Editor
GUI Graphical User Interface
HOT ROD Fiber Optic Module from Triquint Semiconductor, Inc.
HH Horizontal (transmitted), Horizontal (received) polarization
HV Horizontal (transmitted), Vertical (received) polarization
HW Hardware
IC Integrated Circuit
IFFT Inverse Fast Fourier Transform
I/O Input/Output
ISE Integrated Systems Engineering
JTAG Joint Test Action Group (IEEE 1149)
LFM Linear Frequency Modulation
LM Lockheed Martin Corporation
MB Mega Bytes
Mbps Millions of bits per second
MCCI Management Communications and Control, Inc.
MCM Multi-Chip Module
MC/OS Mercury Computer Operating System
MIT/LL Massachusetts Institute of Technology's Lincoln Laboratory
MUT Model Under Test
NEP Node Execution Parameters
OOA Object-Oriented Analysis
OOD Object-Oriented Design
ORCA Optimized Reconfigurable Cell Array (FPGA from Lucent Technologies, Inc.)
PCB Printed Circuit Board
PG Partition Graphs
PGM Processing Graph Method
PGSE Processing Graph Simulation Environment
PLD Programmable Logic Device
PRF Pulse Repetition Frequency
PRICE Parametric Review of Information for Costing & Evaluation
RACEway Interconnect network developed by Mercury Computer Systems, Inc.
RASSP Rapid Prototyping of Application-Specific Signal Processors
RCS Radar Cross-Section
RDD-100 System Design Tool - Ascent Logic
RINO RACEway In/Out
RTL Register Transfer Level
SAR Synthetic Aperture Radar
SBC Single-Board Computer
SDF Standard Delay Format
SHARC Super Harvard ARchitecture Computer
SIMD Single Instruction, Multiple Data
SLOC Software Lines of Code
SNR Signal-to-Noise Ratio
SOW Statement of Work
SPGN Signal Processing Graph Notation
SRTS Static Run Time System
SW Software
UAV Unmanned Aerial Vehicle
vdc Volts, Direct Current
VH Vertical (transmitted), Horizontal (received) polarization
VHDL VHSIC Hardware Description Language
VHSIC Very-High-Speed Integrated Circuits
VME Versa Module Europa (module format)
VMEbus Versa Module Europa Bus
VP Virtual Prototype
VV Vertical (transmitted), Vertical (received) polarization

next up previous contents
Next: 9 Glossary Up: Case Study Index Previous:7 Conclusion

Page Status: in-review, January 1998 Dennis Basara