EE 3714 Digital Devices Lab Home page, All Sections, Robert Reese



EE 3714 Lab Manual

The EE 3714 Lab Manual is available in both Microsoft Word format (.doc) and Adobe Acrobat format (.pdf) via the links on this page.

Each student will be expected to purchase a breadboard/wiring kit from IEEE or HKN before the 2nd week of the semester. This cost is $25; HKN/IEEE representatives will visit each lab in the 2nd week of the semester. Students will also need to purchase a parts kit; this cost is $15 and the parts kits will be sold in lab during the same period that the breadbord kit is purchased. Only cash is accepted for breadboard and part kits purchases (no checks or credit cards will be accepted).

Lab Schedule for Spring 2003

  1. Jan 6 : Lab meeting for TA orientation, Lab policy overview
  2. Jan 13 : Lab #1 Equipment Familiarization
  3. Jan 20 : Lab #2 A Simple Logic Gate
    (Lab Report #1 due, only need title page of lab and abstract for report #1, nothing else).
    Monday labs do not meet because of holiday, will be one week behind.
  4. Jan 27 : Lab #3 Binary Adder (Lab Report #2 due)
  5. Feb 3 : Lab #4 Basic Logic Gates (Lab Report #3 due)
  6. Feb 10 : Lab #5 Arithmetic Logic Unit (Lab Report #4 Due, this is a FORMAL REPORT)
  7. Feb 17 : Lab #6 Simplification of Boolean Logic (Lab Report #5 due)
  8. Feb 24 : Lab #7 Part I: SSN Decoder, 74XX implementation, (Lab Report #6 due)
  9. Mar 3 : Lab #7 Part II: SSN Decoder, PLD implementation
  10. Mar 10 : Spring Break
  11. Mar 17 : Lab #8 Introduction to Flip-Flops (Lab Report #7 due, one report for both parts, must be a FORMAL REPORT)
  12. Mar 24 : Lab #9 Register Implementation (Lab #8 report due)
  13. Mar 31 : Lab #10 Counter Implementation (Lab #9 report due)
  14. Apr 7 : Lab #11 Finite State Machine (Lab #10 report due), TAs will also hand out a sample Lab practicum exam, and students can work on it to prepare for the practicum (this is voluntary).
  15. Apr 14 : catchup for Monday Lab sections (Lab #11). Other sections will meet, and students will work on the sample lab practicum (this is voluntary). Because Lab #11 should only take a short period of time to complete in-lab, Monday Lab students can use the rest of Monday lab time to work on the sample lab practicum, or attend one of the other sessions later in the week to work on the sample lab practicum.
  16. Apr 21 : Lab #12 (Lab #11 report due): In-Lab practical exam. You will be asked to implement a small finite-state-machine (see THIS LINK power point, and pdf,, and Altera Maxplus solution ) for a sample problem) based upon an ASM chart that you will be provided with. You will only be able to use 74XX parts that available in your part kit. You will not be able to use the PLDs in your part kit. This lab is treated as a 'test', so the TA will not be able to answer questions or provide help in solving the problem. You will not be able to ask questions or seek help from fellow students in the class. This exam is open book/open notes. The exam will include scratch paper for you to work the problem. You WILL NOT BE ABLE TO HAVE YOUR LAPTOPS in the lab. Print out any datasheets you need and bring them with you to class. At 20 minutes before the end of the lab period, the TA will begin circulating around the lab asking for demos. You must hand in your worksheets and demo what you have ready upon TA request.
  17. Apr 28 : no lab, dead week.

TA Assignments Spring 2003

Lab Manual

The complete lab manual is available via the links below. Lab manuals from previous semesters are NOT VALID. If you want to save a file to your local disk, right click on the link and use the "Save As" menu choice.

Try to ask your lab TA first about any lab-related problems; if you are not satisifed or still have questions after talking with your TA you can send me (Prof. Robert Reese) email at reese@ece.msstate.edu .

Parts List for Lab

The parts that will be in your parts kit are listed below. If you want to purchase these parts yourself from http://www.digikey.com or some equivalent vendor, feel free.

  1. quantity(1), CD74HCT00E Quad 2-input Nand
  2. quantity(1), CD74HCT02E Quad 2-input NOR
  3. quantity(1), CD74HCT04E Hex inverter
  4. quantity(1), CD74HCT08E Quad 2-input And
  5. quantity(1), CD74HCT10E Triple 3-input Nand
  6. quantity(1), CD74HCT32E Quad 2-input Or
  7. quantity(1), CD74HCT86E Quad 2-input Xor
  8. quantity(2), CD74HCT74E Dual D-FF
  9. quantity(1), CD74HCT109E Dual JK FF
  10. quantity(2), Cypress PALC22V10D-15PC (Flash-Eraseable 22V10, DIP package) (another suitable part is the Atmel ATF22V10C-10PC)

Electronic Submission Instructions

All labs must be submitted electronically via the Web as either a POSTSCRIPT, PDF, or Microsoft WORD (.doc) file.

Click HERE to go to the WWW page that is used to submit your lab. You MUST know your ECE login name and password to access this page. Click HERE for a FAQ about electronic submission of lab reports --- it will also tell you how to determine your ECE login/password.

Due Date/Late Lab Report Policy/Incorrect Submission

A report for an assignment is due at the lab time for the next time your section meets. In some cases, you might have a holiday between between when you perform a lab, and when the next lab meets, which would mean that you would have more than one week to do the lab report. The last lab meeting is an in-lab practicum, so there is no lab report for that lab. In the case of a two week lab there is only one lab report required and this will be due at the lab meeting after the 2nd week of the 2-week lab.

15 points will subtracted per day that a lab is submitted late. The electronic submission directory has time/date information on each file so we can verify when a lab report was submitted. After 1 week (7 days), a lab grade is automatically assigned a 0.

There can be two problems in submitting lab reports via electronic submission. The first problem is that the lab does not reach the server. After you submit your lab, it is YOUR RESPONSIBILITY to check to see if the report reached the server (there is a link provided for this purpose). If it did not reach the server, then keep submitting until it shows up in the report of submitted labs.

The second problem is that you submit your lab report with the wrong lab number. (Submit lab #2 as Lab #3 or submit Lab #5 as Lab #4 which overwrites a previously submitted lab report). This is a USER ERROR, and we cannot prevent you from doing this. If you discover that you have done this, you must resolve this problem with the TA as SOON AS POSSIBLE. It is not acceptable to wait until the end of the semester and then complain about an incorrectly submitted lab that happened several weeks previously. If you do not resolve this with the TA promptly, expect a 0 grade on that lab.

60% Pass/Fail Policy

You must earn at least a 60% average on your lab grade or you will fail the course regardless of your lecture grade. This policy is non-negotiable and is independent of the course instructor teaching your lecture session.

ECE Login Accounts

ALL students, regardless of major, who take an ECE course (even one that is cross listed as a CS course) receives an ECE login account. You must know this account name in order to electronically submit your lab reports or check your graded lab reports. If this is the FIRST time that you have taken an ECE course, Ms. Katherine Brooks in the ECE main office (Simrall 216) will have an account slip that has the username/password. If Ms. Brooks does not have your slip, or you have forgotten your username/password, then you will need to see Mr. Michael Lane (1st floor, office in Computer Lab, Rm 139). It usually takes a week for new accounts to be added after the 1st class day of the semester.

Datasheets

Data sheets for TTL parts are available via the WWW at this link . This is a search engine; enter a part number like "7400" and you will given a general information sheet plus a link to PDF file that has the complete datasheet (PDF file can only be read with Adobe acrobat). You may need to try technology specific variations on the numbers like "74LS00" instead of "7400", or just type in the last part and omit the '74' (i.e. for 74181, use just 181). Several parts may show up like "SN54LS181", "SN74S181", etc - usually all of these will be functionally equivalent and have the same pinout UNLESS SPECIFICALLY noted on the datasheet. General information on data sheets on CDROM can be found here .

Manufacturer Specific Datasheets

The parts that come in your parts kits are from a variety of vendors and may be a mixture of CMOS and TTL parts. The pinouts for a 7400 (a package that has 4 NAND gates) will be the same regardless of whether or not it is TTL or CMOS, or which vendor made it. However, the timing information will vary depending on CMOS vs TTL and the vendor. You may need to locate the datasheet for a specific part number, such as 'MM74C04' for some labs in order to get the correct timing information. To locate this datasheet, go to google.com and search using keywords 'semiconductor parts locator'. This will give you several links to varies search engines that can be used to locate the vendor for a particular part (such as http://www.onlinetechx.com ). Once you know the specific vendor name (such as Fairchild , National Semiconductor , Motorola , Texas Instruments , etc), you can use google.com to locate their site -- once at the vendors web site, you should be able to use their search engine to locate a PDF datasheet for your particular data sheet. You will need to do some digging but the information is out there.

Altera MAX+PLUS II

Starting with Lab #6, some of the labs will have an Altera MAX+PLUS II simulation requirement. The book "Fundamentals of Digital Logic with VHDL Design" by Stephen Brown and Zvonko Vranesic has the Maxplus software on CDROM in the back cover.

Alternatively, you can download the MAX+PLUS Student Edition Software (v. 10.1) directly from the Altera Website. (look at the bottom of the page for the download link for student version 10.1 . The file size is 48 MBytes -- if you do not have a fast internet connection, I would suggest using one of the PCs in the Simrall first floor lab and writing the file to CDROM (these PCs have CD-writers).

Obtain a license file from Altera for either version 10.1 or version 9.23 by clicking HERE .

Tutorials on Altera MAX+PLUS II

The use of Altera Maxplus in this course is very basic. You only need to know how to enter simple schematics and create small waveform files to stimulate inputs and view outputs.

  1. The Brown/Vranesic textbook has an excellent tutorial on Maxplus in the Appendix B (Tutorial #1). This book is required by ECE 4743 Digital Systems Design and there should be copies available in the bookstore or used copies may be available from local bookstores.
  2. This is a small tutorial from the University of Florida that is well written and easy to follow.
  3. The official Altera Maxplus Documentation has a tutorial on using Maxplus. This tutorial is fairly involved, and demonstrates parts of Maxplus that you do not really need.
If you have problems installing Maxplus, then send email to reese@ece.msstate.edu .

To demo your Maxplus simulation prelab to the Lab TA, use a laptop PC if you have one. If you don't have a laptop PC, then bring screenshots of your schematics + simulations for TA signoff. At some later semester, once the laptop PC requirement has percolated thru the engineering student population, we will no longer accept screenshots.

Capturing Screenshots for Lab Reports

For lab reports, you will want to include Altera schematics and simulation results.

One way to do this is via the 'ALT+PRINT_SCREEN' key on the keyboard, this will copy the currently active window to the clipboard. You can then paste this into your document. You may want to use an image editor to crop only the portion of the image that has your schematic. You should also save the file as either as a '.gif' or '.jpg' image to reduce your file size - do not use '.bmp' as this will produce a large file size for your lab document.

There are other programs available that allow you do a a 'screen capture' of the portion of the screen with the schematic or simulation results and paste this as a picture object into your report. There are dozens of shareware/freeware screen capture utilities available for Windows platforms. Go to ZDNET Downloads Section and do a search for 'screen capture'. Download one of the utilities that pops up and try it out. If it is a shareware title and the author requests that you purchase the program after a trial period, please honor the author's request if you continue to use it after the trial period. One program that I like is called 'HyperSnap' and is well worth the shareware fee (you can use it for free but images will have a Hypersnap logo in them). And no, I don't work for Hyperionics.com.

Information for EE 3714 Lab TAs

Grading

For consistency purposes, count Lab #7 as 200 points (100 points for each part). The in-lab final exam counts as a normal lab exercise (100 points). Your spreadsheet should have 13 entries (1300 points total).

JEDEC Files

Some labs require JEDEC files for PLD functions. Here are the required files (the .jed file is needed for programming, the other files are provided for information purposes).

Hints on converting student .doc to .PDF for grading

To convert a .doc file to PDF from within MS Word, print to the 'Acrobat Distiller' printer. Occassionally, you might have MS Word crash during this process - One cause of this is the use of 'Arial Unicode MS' font in the document, which can happen if a cut and paste from a web page was placed into the .doc file. You can use the Find/Replace option in MS Word to find and replace 'fonts' of some type with another. When the find/replace menu comes up, look at the bottom, and chose the 'format' option, then chose the 'font' option. Replace 'Arial Unicode MS' with 'Times New Roman' and you should no longer have the problem.