Verilog Golden Reference Guide

Doulos’ Verilog Golden Reference Guide is a handy desktop reference for Verilog designers. Serving as both a Verilog reference and an aide de memoire, this small wirebound book contains Verilog syntax, sample code, synthesis caveats and other useful tips. You can obtain a copy of the Verilog Golden Reference Guide from Doulos for the princely sum of £39. Click here to reserve your copy.

The remainder of the text on this page and the related pages is extracted from the Verilog Golden Reference Guide itself (re-formatted for the Web, of course!).

If you are new to Verilog, you should start by reading A Brief Introduction to Verilog.

You’ll also need to refer to the Key to Notation used to define Verilog syntax on the sample pages.

Here’s a selection of sample pages...

• `include Compiler Directive
• Continuous Assignment
• Register
• Module

...and a taster of the Golden Reference Guide’s contents.

About the Verilog Golden Reference Guide

The Verilog Golden Reference Guide is a compact quick reference guide to the Verilog language, its syntax, semantics, synthesis and application to hardware design.

The Verilog Golden Reference Guide is not intended as a replacement for the IEEE Standard Verilog Language Reference Manual. Unlike that document, the Golden Reference guide does not offer a complete, formal description of Verilog. Rather, it offers answers to the questions most often asked during the practical application of Verilog, in a convenient reference format.

Nor is The Verilog Golden Reference Guide intended to be an introductory tutorial. Information is presented here in a terse reference format, not in the progressive and sympathetic manner necessary to learn a subject as complex as Verilog. However, acknowledging that those already familiar with computer languages may wish to use this guide as a Verilog text book, a brief informal introduction to the subject is given at the start.

The main feature of The Verilog Golden Reference Guide is that it embodies much practical wisdom gathered over many Verilog projects. It does not only provide a handy syntax reference; there are many similar books which perform that task adequately. It also warns you of the most common language errors, gives clues where to look when your code will not compile, alerts you to synthesis issues, and gives advice on improving your coding style.

The Verilog Golden Reference Guide was developed to add value to the Doulos range of Verilog training courses, and also to complement HDL PaceMaker, the Verilog Computer Based Training package from Doulos.

Using the Verilog Golden Reference Guide

The main body of the guide is organised alphabetically. Each section is indexed by a key term which appears prominently at the top of each page. Often you can find the information you want by flicking through the guide looking for the appropriate key term. If that fails, there is a full index at the back.

Most of the information in the guide is organised around the Verilog syntax headings, but there are additional special sections on Coding Standards, Design Flow, Errors, Reserved Words and, after the main alphabetical reference section, Compiler Directives, System Tasks and Functions and Command Line Options.

There is a comprehensive index for the Verilog Golden Reference Guide. Bold index entries have corresponding pages in the main alphabetical reference section. The remaining index entries are followed by a list of appropriate page references in the main alphabetical reference section, given in order of importance.

Syntax Summary

For a Syntax Summary of Verilog, click here.

Alphabetic Reference Section

Compiler Directives

• `celldefine
• `default_decay_time
• `default_nettype
• `default_trireg_strength
• `define
• `delay_mode_distributed, etc.
• `ifdef
• `include
• `resetall
• `timescale
• `unconnected_drive
• `undef

System Tasks and Functions

Command-line options

• -f CommandFile
• -k KeyFile
• -l LogFile
• -r SaveFile
• -s
• -u
• -v LibraryFile
• -y LibraryDirectory
• +define+MacroName
• +incdir+Directory[+Directory...]
• +libext+extension
• +notimingchecks
• +mindelays, +typdelays, +maxdelays

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This page was last updated 16^th July 1996.

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