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Lists information about the logic elements (LUTs only) that were duplicated and resynthesized during fitting. This section is omitted if you did not turn on Perform logic element level LUT resynthesis in the Netlist Optimizations page in the Settings dialog box (Assignments menu), if the design did not have any LUTs duplicated or resynthesized during fitting, or if you did not specify a Cyclone™, Stratix™, and Stratix™ GX device for compilation.
Information is provided as follows:
| Heading | Description | Value |
|---|---|---|
| LUT Name | Shows the name of the LUT that was duplicated or removed during fitting. | <LUT name> |
| Created/Deleted | Shows whether the LUT was created or deleted during fitting. | Created | Deleted |
The following example shows a portion of the Logic Element Level LUT Resynthesis section generated for a sample design:
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- PLDWorld - |
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