Primitive

OUTPUT or OUT Primitive/Port



AHDL Syntax: out1 : OUTPUT;
VHDL Syntax: out1 : OUT
Source: All logic functions except BIDIR
Destination: Device I/O pins or higher levels in the hierarchy tree

In a Block Design File (.bdf), you can use the Pin Properties dialog box to specify pin properties for this primitive, such as the pin name and default value.

NOTE Only the pin assignments of the compilation focus are used during compilation.


Back to Top

- PLDWorld -

 

Created by chm2web html help conversion utility.