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AHDL Syntax: | out1 : OUTPUT; |
VHDL Syntax: | out1 : OUT |
Source: | All logic functions except BIDIR |
Destination: | Device I/O pins or higher levels in the hierarchy tree |
In a Block Design File (.bdf), you can use the Pin Properties dialog box to specify pin properties for this primitive, such as the pin name and default value.
Only the pin assignments of the compilation focus are used during compilation. |
- PLDWorld - |
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