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Once you have compiled a design with the Quartus® II software, you can run a simulation or timing analysis tool from within the Quartus II software by using the Run Simulation Tool command (Tools menu).
To run a simulation or timing analysis tool from within the Quartus II software:
If you have not already done so, open an existing project.
If you have not already done so, compile the project.
Choose Run Simulation Tool (Tools menu). The Quartus II software generates a script that runs the specified tool, which processes the Quartus IIgenerated VHDL Output File (.vho) or Verilog Output File (.vo).
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