EDA Interfaces

Running an EDA Simulation or Timing Analysis Tool After Compilation



Once you have compiled a design with the Quartus® II software, you can run a simulation or timing analysis tool from within the Quartus II software by using the Run Simulation Tool command (Tools menu).

To run a simulation or timing analysis tool from within the Quartus II software:

  1. If you have not already done so, open an existing project.

  2. If you have not already done so, compile the project.

  3. Specify a simulation or timing analysis tool.

  4. Choose Run Simulation Tool (Tools menu). The Quartus II software generates a script that runs the specified tool, which processes the Quartus II–generated VHDL Output File (.vho) or Verilog Output File (.vo).


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