Using AHDL in the Quartus II Software
See Also
Design Structure
Elements
Syntax
Inserting an HDL Template
Using Numbers
Using Constants & Evaluated Functions
Creating Combinatorial Logic
Implementing Boolean Expressions & Equations
Naming a Boolean Operator or Comparator
Declaring Nodes
Defining Groups
Implementing Conditional Logic
Using If Then Statement Logic
Using Case Statement Logic
Using an If Then Statement vs. a Case Statement
Creating Decoders
Using Default Values for Variables
Implementing Active-Low Logic
Implementing Bidirectional Pins
Implementing Tri-State Buses
Creating Sequential Logic
Declaring Registers
Declaring Registered Outputs
Creating Counters
Designing State Machines
Implementing State Machines
Setting Clock, Reset & Enable Signals
Assigning State Machine Bits & Values
Implementing State Machines with Synchronous Outputs
Implementing State Machines with Asynchronous Outputs
Recovering from Illegal States
Implementing a Hierarchical Project
Using Altera-Provided Unparameterized Functions
Using Altera-Provided Parameterized Functions
Using Custom Megafunctions & Macrofunctions
Implementing LCELL & SOFT Primitives
Implementing CAM, RAM & ROM
Using Iteratively Generated Logic
Using Conditionally Generated Logic
Using the Assert Statement
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