RASSP Model Year Architecture (RASSP-MYA) Appnote

Abstract

The Rapid Prototyping of Application-Specific Signal Processors (RASSP) program is changing the way engineers design embedded signal processors. The objective of the program was to reduce time-to-market and cost by at least a factor of four, and improve design quality by at least a factor of four. These improvements were achieved by developing complementary methodology, model-year architecture and enterprise system infrastructure elements which, when combined, significantly reduce the cost and time required to field embedded signal processors. The model-year architecture defines how elements must be designed to achieve low-cost upgrades through the use of open interface standards. LM/ATL has defined and demonstrated a Standard Virtual Interface (SVI) and a Reconfigurable Network Interface (RNI) that when used properly can greatly reduce your product upgrade cycle time and cost

Purpose

The ATL RASSP team developed the model-year architecture to promote design upgrades and reuse via standardized, open interfaces while leveraging state-of-the-art commercial technology developments. What drives the RASSP signal processor architecture are the requirements imposed on signal processors to meet changing mission-critical processing needs, and the military's requirements for long-term life cycle support.

Roadmap

1.0 Executive Summary

2.0 Introduction

3.0 Model Year Functional Architecture Technology Overview

• 3.1 Model - Year Architecture Functional Architecture
• 3.2 Model - Year Architecture Software Architecture

4.0 Implementation of the Functional Architecture Standard Virtual Interface (SVI) and Reconfigurable Network Interface (RNI)

• 4.1 Model-Year Hardware Interoperability
• 4.2 Standard Virtual Interface (SVI)
• 4.3 Reconfigurable Network Interface (RNI)
• 4.4 MYA Application Example
  • 4.4.1 Introduction
  • 4.4.2 Approach
    • 4.4.2.1 Select the high payoff interfaces for encapsulation
    • 4.4.2.2 Research existing encapsulations to find examples that are similar to new design
      • 4.4.2.2.1 Internal Node and its associated processor bus
      • 4.4.2.2.2 Fabric Interface
      • 4.4.2.2.3 Sensor Interface
    • 4.4.2.3 Use of templates
    • 4.4.2.4 Develop and validate the Virtual Prototype Implementation
• 4.5 Validation Techniques
• 4.6 Development Time