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RASSP Model Year Architecture (MYA) Appnote

2.0 Introduction

The model-year concept is analogous to the practices of the auto industry, where products are upgraded and improved on a model-year basis; complete products are redesigned less frequently. The key to reducing time-to-market and cost is to leverage commercial technology that provides significant processing improvements every 2 - 3 years. Embedded signal processors must support introducing these emerging processor components, products, and standards throughout the product life cycle, with minimal impact on the surrounding system hardware and software. These improvements are enabled by capturing and validating the processor's functional and performance characteristics at the system/subsystem level, independent of the specific hardware and software implementation. The goal of the model year architecture task is to provide a framework for developing application - specific signal processor architecture designs that encourages and facilitates hardware and software reuse, upgradability and technology insertion. This approach to plug-and-play technology is being adapted for use by the Virtual Socket Interface Alliance [VSIA] for interconnecting Virtual Components from different IP vendors in System-on-a-Chip applications.

The model-year architecture enables engineers to design architectures through a structured framework that ensures that designs incorporate all the required model - year features. The basic elements that comprise the model-year architecture are the functional architecture (hardware and software), encapsulated library components, and design guidelines and constraints, as shown in Figure 2 - 1. Synergism between the model-year architecture framework and the RASSP methodology is required because all areas of the methodology, including architecture development, hardware/software codesign, reuse library management, hardware synthesis, target software generation, and design for test, are impacted by the model-year architecture framework.

Section 3.0 of this document, the Model Year Architecture Technology Overview, introduces the concept of the functional architecture and the terminology of the Model Year Architecture (MYA). It discusses both the hardware and software aspects of the MYA.

Section 4.0 discusses the Implementation of the Functional Architecture. The Standard Virtual Interface (SVI) and Reconfigurable Network Interface (RNI) are introduced. These are the primary structures for supporting the model year hardware architecture for nodes and interconnect fabrics. References to the guidelines developed for example encapsulations are given.

An Overview of Emerging Interface Standards is presented in Section 5.0. The relationship of existing standards to the Model Year Architecture framework is discussed. Examples of the various types of interfaces are provided.

Section 6.0 presents, the Model Year Software Architecture. An approach to software layering which is used to achieve software application portability is described. Application programming interfaces are introduced which enable portability of applications both to new operating systems as well as new processors with new primitive libraries.

Finally, in Section 7.0, Implementation of Model Year in a Reuse System, the capabilities of a Reuse system that supports verification of a model-year architecture signal processor are briefly described. These are directly related to the most important aspects of creating, maintaining and using a reuse library, i.e., the existence of reuse elements at various levels of the modeling abstraction and the ability to recall reuse elements. The reuse library must support models at various levels of abstraction and elements in the library must be amply described in order to facilitate reuse.

Next: 3 Model Year Functional Architecture Technology Overview Up: Appnotes Index Previous: 1 Executive Summary