Next: 7 Implementation of a Model Year in a Reuse System
Up: Appnotes Index
Previous:5 Emerging Interface Standards Overview
The model-year software architecture and interoperability relies heavily on a standard API and services supplied by the run-time system, which encapsulates the operating system and the primitive libraries. The model-year software architecture is shown in Figure 6 - 1, along with the associated elements users need to automatically generate software. The intent on RASSP is to drive toward graph-based autocode generation using data flow graphs (DFGs) to represent application (algorithm) code and state machine diagram graphs to represent command/control code to the maximum extent. In the event of a processor upgrade, the graph-based representation provides the common definition of operation and service requirements even though the underlying processor hardware, operating system, and libraries have changed. The same holds true if a primitive library or operating system for a given processor type is upgraded.
The model-year software application layer is divided into two parts: the command program and the application's data flow graphs. The command program does the following:
The control interface provides the services that implement these operations as described in the Autocoding for DSP Control Application Note. Command software state machine descriptions that can be autocoded using such tools as Verilog’s ObjectGeode were developed on the program. The command program can directly use the high-level interface to operating system services provided by the Real-Time POSIX compliant system. Building the command program based on a standard control interface and on POSIX isolates it from the microkernel and allows it to be easily ported to each new model-year architecture.
An application's data flow graphs are developed using a data flow paradigm such as PGM's Signal Processing Graph Notation (SPGN) or GEDAE. The DFG interface services are largely invisible to the developer, they include:
In addition to the DFG interface, the DFG paradigm needs a set of primitive nodes that can be used to build the graph. A SPGN graph is converted into an Higher Order Language (HOL) , such as C or ADA, via autocode generation. The resulting code contains calls to a standard set of domain primitives. Typically, these primitives implement such operations as FFTs, filters, waveform generators, and matrix manipulations, among others. To ease portability to various processors and to take advantage of vendor and third-party-optimized target-processor libraries, Target Primitive Maps (TPMs) translate the standard domain-primitive calls to those specific to the desired support libraries. The TPM translates calling conventions of the domain primitives into those compatible with the target-processor libraries. This may also include translating a single call of a domain primitive into different target-processor library element calls, depending on a particular domain-primitive parameter or parameters. A simple example of this may be an FFT/IFFT domain primitive that might be mapped to separate FFT and IFFT target-processor library elements, depending on a forward/inverse switch in the domain-primitive parameters. Refer to the Hardware/Software Codesign and the Data Flow Graph Design Application Notes for a more detailed explanation of DFG and these interface services.
6.0 Model Year Software Architecture
6.1 Model-Year Software Architecture
6.2 Application Software
Requirements Category | Services Provided |
1. Tasks control using processes and threads | - context witch time (process and thread) - take/give semaphore time (intra- and inter- process) - thread control: spawn, suspend, reume, terminate, priority - multiprocessor thread support |
2. Interrupt Handling |
- Interrupt response time affected by:
- Kernel disabling of interrupts for time T off |
3. Memory Management |
- Performance of alloc and free - Class of memory - onchip, SRAM, cache, etc. |
4. Interprocessor Communication |
- Shared Memory
- Explicit: interface for copying to/from shared memory - Point-to-point Communication
- Amount of data copying required - Heterogeneous Processort (data translation standards) - XDR, Format description , etc. - Scalability |
5. I/O |
- Ability to add new device drivers - Ability to suport BIT and performance monitoring |
The capabilities provided by these services must support typical embedded multiprocessor applications. These applications will be comprised of host and target processes, all running as peers, grouped on multiple processors. Multiple processes grouped on any single processor must be able to run in parallel. Since a group of processors may physically reside on the same or different boards, a common method of memory addressing is needed to eliminate memory overlaps and address ambiguity between processors. The operating system must have the characteristics of a distributed, preemptive, multi-processor, multi-tasking operating system, while also supporting the high-performance throughput capabilities of tightly coupled processes. The operating system will provide a kernel-level interface to the multi-tasking preemptive kernel. This interface will include allocation and control functions for local memory, functions to connect and control interrupt handlers, and functions to manipulate programmable hardware that may be on various processor systems, such as DMA controllers and timers.
The RASSP approach can accommodate signal processor designs that include COTS products with a proprietary operating system as long as the operating system meets the service requirements defined for RASSP, and as long as it provides an open interface on which the run-time system and API(s) can be ported. The important issue, as with all RASSP designs, is to ensure that implementing the underlying operating system, its services, and API is transparent to the application software to make it easier to insert model year upgrades of hardware and system-level software.
Next: 7 Implementation of a Model Year in a Reuse System
Up: Appnotes Index
Previous:5 Emerging Interface Standards Overview