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mti_CreateDriver()

Creates a driver on a VHDL signal.

Syntax 

driver_id = mti_CreateDriver( signal_id )

Returns

Name
Type
Description
driver_id
mtiDriverIdT
A handle to the new driver or NULL if there is an error

Arguments

Name
Type
Description
signal_id
mtiSignalIdT
A handle to a VHDL signal

Description

mti_CreateDriver() creates a new driver for the specified array or scalar signal. A driver must be created for a resolved signal in order to be able to drive values onto that signal and have the values be resolved. Multiple drivers can be created for a resolved signal, but no more than one driver can be created for an unresolved signal. Alternatively, an unresolved signal's value can be changed using mti_SetSignalValue().

When using mti_CreateDriver() it is necessary to follow up with a call to mti_SetDriverOwner(); otherwise, the vsim drivers command and the Dataflow window may give unexpected or incorrect information regarding the newly created driver.

A driver cannot be created on a signal of type record, but drivers can be created on non-record subelements of a record signal.

Related functions

mti_FindDriver()

mti_GetDriverSubelements()

mti_ScheduleDriver()

mti_SetDriverOwner()

Example

FLI code 

#include <stdlib.h>
#include <mti.h>

typedef enum {
    STD_LOGIC_U,
    STD_LOGIC_X,
    STD_LOGIC_0,
    STD_LOGIC_1,
    STD_LOGIC_Z,
    STD_LOGIC_W,
    STD_LOGIC_L,
    STD_LOGIC_H,
    STD_LOGIC_D
} standardLogicType;

typedef struct {
    mtiSignalIdT sigid;
    mtiDriverIdT drvid;
    mtiTypeIdT   time_type;
} instanceInfoT;

void driveScalarSignal( void * param )
{
    char          * curr_time_str;
    char          * region_name;
    instanceInfoT * inst = (instanceInfoT*)param;
    mtiInt32T       sigval;
    mtiTime64T      curr_time;

    region_name   = mti_GetRegionFullName(mti_GetSignalRegion(inst->sigid));
    sigval        = mti_GetSignalValue( inst->sigid );
    curr_time_str = mti_Image( mti_NowIndirect(&curr_time), inst->time_type );
    mti_PrintFormatted( "Time %s delta %d: Signal %s/%s is %s\n",
                       curr_time_str, mti_Delta(),
                       region_name, mti_GetSignalName( inst->sigid ),
                       mti_SignalImage(inst->sigid) );

    switch ( sigval ) {
      case STD_LOGIC_U:  sigval = STD_LOGIC_X;  break;
      case STD_LOGIC_X:  sigval = STD_LOGIC_0;  break;
      case STD_LOGIC_0:  sigval = STD_LOGIC_1;  break;
      case STD_LOGIC_1:  sigval = STD_LOGIC_Z;  break;
      case STD_LOGIC_Z:  sigval = STD_LOGIC_W;  break;
      case STD_LOGIC_W:  sigval = STD_LOGIC_L;  break;
      case STD_LOGIC_L:  sigval = STD_LOGIC_H;  break;
      case STD_LOGIC_H:  sigval = STD_LOGIC_D;  break;
      case STD_LOGIC_D:  sigval = STD_LOGIC_U;  break;
      default:           sigval = STD_LOGIC_U;  break;
    }
    mti_ScheduleDriver( inst->drvid, sigval, 5, MTI_INERTIAL );

    mti_VsimFree( region_name );
}

void driveArraySignal( void * param )
{
    char          * curr_time_str;
    char          * region_name;
    char          * sigval;
    instanceInfoT * inst = (instanceInfoT*)param;
    int             i;
    mtiTime64T      curr_time;

    region_name   = mti_GetRegionFullName(mti_GetSignalRegion(inst->sigid));
    sigval        = (char *)mti_GetArraySignalValue( inst->sigid, 0 );
    curr_time_str = mti_Image( mti_NowIndirect(&curr_time), inst->time_type );
    mti_PrintFormatted( "Time %s delta %d: Signal %s/%s is %s\n",
                       curr_time_str, mti_Delta(),
                       region_name, mti_GetSignalName( inst->sigid ),
                       mti_SignalImage(inst->sigid) );

    for ( i = 0; i < mti_TickLength( mti_GetSignalType( inst->sigid )); i++ ) {
        switch ( sigval[i] ) {
          case STD_LOGIC_U:  sigval[i] = STD_LOGIC_X;  break;
          case STD_LOGIC_X:  sigval[i] = STD_LOGIC_0;  break;
          case STD_LOGIC_0:  sigval[i] = STD_LOGIC_1;  break;
          case STD_LOGIC_1:  sigval[i] = STD_LOGIC_Z;  break;
          case STD_LOGIC_Z:  sigval[i] = STD_LOGIC_W;  break;
          case STD_LOGIC_W:  sigval[i] = STD_LOGIC_L;  break;
          case STD_LOGIC_L:  sigval[i] = STD_LOGIC_H;  break;
          case STD_LOGIC_H:  sigval[i] = STD_LOGIC_D;  break;
          case STD_LOGIC_D:  sigval[i] = STD_LOGIC_U;  break;
          default:           sigval[i] = STD_LOGIC_U;  break;
        }
    }
    mti_ScheduleDriver( inst->drvid, (long)sigval, 5, MTI_INERTIAL );

    mti_VsimFree( sigval );
    mti_VsimFree( region_name );
}

void initForeign(
    mtiRegionIdT       region,   /* The ID of the region in which this       */
                                 /* foreign architecture is instantiated.    */
    char              *param,    /* The last part of the string in the       */
                                 /* foreign attribute.                       */
    mtiInterfaceListT *generics, /* A list of generics for the foreign model.*/
    mtiInterfaceListT *ports     /* A list of ports for the foreign model.   */
)
{
    instanceInfoT * inst;
    mtiProcessIdT   procid;

    inst        = (instanceInfoT *)mti_Malloc( sizeof(instanceInfoT) );
    inst->sigid = mti_FindSignal( "/top/s1" );
    inst->drvid = mti_CreateDriver( inst->sigid );
    procid      = mti_CreateProcess( "sigDriver1", driveScalarSignal, inst );
    mti_Sensitize( procid, inst->sigid, MTI_EVENT );
    mti_ScheduleWakeup( procid, 0 );
    mti_SetDriverOwner( inst->drvid, procid );
    inst->time_type = mti_CreateTimeType();

    inst        = (instanceInfoT *)mti_Malloc( sizeof(instanceInfoT) );
    inst->sigid = mti_FindSignal( "/top/s2" );
    inst->drvid = mti_CreateDriver( inst->sigid );
    procid      = mti_CreateProcess( "sigDriver2", driveArraySignal, inst );
    mti_Sensitize( procid, inst->sigid, MTI_EVENT );
    mti_ScheduleWakeup( procid, 0 );
    mti_SetDriverOwner( inst->drvid, procid );
    inst->time_type = mti_CreateTimeType();
}

HDL code 

library ieee;
use ieee.std_logic_1164.all;

entity top is
end top;

architecture a of top is

  signal s1 : std_logic := '0';
  signal s2 : std_logic_vector( 3 downto 0 ) := "UX01";

begin
end a;

Simulation output 

% vsim -c top -foreign "initForeign for_model.sl"
Reading .../modeltech/sunos5/../tcl/vsim/pref.tcl

# 5.5c

# vsim -foreign {initForeign for_model.sl} -c top
# Loading .../modeltech/sunos5/../std.standard
# Loading .../modeltech/sunos5/../ieee.std_logic_1164(body)
# Loading work.top(a)
# Loading ./for_model.sl
VSIM 1> run 42
# Time 0 ns delta 1: Signal /top/s1 is '0'
# Time 0 ns delta 1: Signal /top/s2 is "UX01"
# Time 5 ns delta 0: Signal /top/s2 is "X01Z"
# Time 5 ns delta 0: Signal /top/s1 is '1'
# Time 10 ns delta 0: Signal /top/s1 is 'Z'
# Time 10 ns delta 0: Signal /top/s2 is "01ZW"
# Time 15 ns delta 0: Signal /top/s2 is "1ZWL"
# Time 15 ns delta 0: Signal /top/s1 is 'W'
# Time 20 ns delta 0: Signal /top/s1 is 'L'
# Time 20 ns delta 0: Signal /top/s2 is "ZWLH"
# Time 25 ns delta 0: Signal /top/s2 is "WLH-"
# Time 25 ns delta 0: Signal /top/s1 is 'H'
# Time 30 ns delta 0: Signal /top/s1 is '-'
# Time 30 ns delta 0: Signal /top/s2 is "LH-U"
# Time 35 ns delta 0: Signal /top/s2 is "H-UX"
# Time 35 ns delta 0: Signal /top/s1 is 'U'
# Time 40 ns delta 0: Signal /top/s1 is 'X'
# Time 40 ns delta 0: Signal /top/s2 is "-UX0"
VSIM 2> drivers /top/s1
# Drivers for /top/s1:
#    X  : Signal /top/s1
#      X : Driver /top/sigDriver1
#          0 at 45 ns
#
VSIM 3> drivers /top/s2
# Drivers for /top/s2(3:0):
#    -  : Signal /top/s2(3)
#      - : Driver /top/sigDriver2
#          U at 45 ns
#    U  : Signal /top/s2(2)
#      U : Driver /top/sigDriver2
#          X at 45 ns
#    X  : Signal /top/s2(1)
#      X : Driver /top/sigDriver2
#          0 at 45 ns
#    0  : Signal /top/s2(0)
#      0 : Driver /top/sigDriver2
#          1 at 45 ns
#
VSIM 4> quit

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