keywords
VHDL keywords and delimiters
prepared by P.Bakowski
This page combines the list of reserved words and VHDL delimiters. The listed words incorporate the links toward detailed illustartions.
Contents: VHDL'87 reserved words, VHDL'93 reserved words, VHDL'87 attributes, VHDL'93 attributes, VHDL delimiters
VHDL reserved words
The following alphabetically ordered list provides the currently implemented and used VHDL reserved words. The lower and upper case have the same meaning. However, for the reasons of presentation only lower case letters are used.
reserved words for VHDL'87
abs access after alias all and architecture array assert attribute
begin block body buffer bus
case component configuration constant
disconnect downto
else elsif end entity exit
file for function
generate generic guarded
if in inout is
label library linkage loop
map mod
nand new next nor not null
of on open or others out
package port procedure process
range record register rem report return
select severity signal subtype
then to transport type
units until use
variable
wait when while with
additional reserved words for VHDL'93
group
impure inertial
literal
postponed pure
reject rol ror
shared sla sll sra srl
unaffected
xnor
predefined (still valid) attributes for VHDL'87
'pos(x) 'val(x) 'base 'succ(x) pred(x) 'leftof(x) 'rightof(x)
'left 'right 'high 'low
'left[(n)] 'right[(n)] 'high[(n)] 'low[(n)]
'range[(n)] 'reverse_range[(n)] 'length[(n)]
'event 'active 'last_event 'last_active 'last_value
'delayed[(t)] 'stable[(t)] 'quiet[(t)]
newly predefined attributes for VHDL'93
'ascending 'image 'value 'ascending(n)
'driving 'driving_value
'simple_name 'instance_name 'pathname
VHDL delimiters