VHDL operators

The operators are listed in below in order of decreasing precedence.

Highest precedence

exponentiation

absolute value

complement

**

abs

not

power:=2**6;

posit:= abs -120;

a:= not b;

multiplying

dividing

modulus

remainder

*

/

mod

rem

prod:= a * b;

v := 7/4; -- =1

c:= -1 mod 5; --=4

r:= -1 rem 5; -- = -1

sign (unary +)

(unary -)

+

-

y:= +a;

x:= -a;

adding

subtracting

concatenation

+

-

&

s:= a+b;

sub:= a-b;

five_bits:= two_bits & "010";

not equal

equal

less than

greater than

less than or equal

greater than or equal

/=

=

<

>

<=

>=

if (accum /= 0) then z:= 0

if (accum = 0) then z:= '1'

if (a < b) then ..

if (a > b) then ..

if (count <= 7) then ..

if (count >= 0) then ..

and

or

nand

nor

xnor


shift left logically

shift left arithmetically

shift right logically

rotate logically

rotate arithmetically

and

or

nand

nor

xnor


sll

sla

srl

rol

ror

a := b and '1';

a := c or '0';

q := r nand qbar;

q := s nor qbar;

p:= a xnor b;


a := b sla 1;

a := b sra 2; -- 2's complement

a := b sra 1;

a := b rol 4;

a := b ror 3; -- 2's complement

Lowest precedence