SFL is one of the digital hardware description language, produced by NTT. There are coding examples written by SFL for Lecture "Integrated Circuit I" and "Student Experiments on Electronic Eng." in our dept. They are available to use on NTT PARTHENON. They are already checked their performance by Behavioral Simulator "SECONDS". However there may be several buggs which I cannot detect. Please send e-mail to "tootsuka@de.tokyo-ct.ac.jp" if you find buggs.
| Module Name | Abstract. |
|---|---|
| and | and |
| d_ff | D Flip Flop |
| exnor | Exclusive Nor |
| exor | Exclusive Or |
| fa | Full Adder (No.1) |
| fa_inst | Full Adder (No.2) |
| jk_ff | JK Flip Flop |
| nand | Nand |
| nor | Nor |
| or | Or |
| Module Name | Abstract. | |
|---|---|---|
| acc4 | 4 Bit Accumulator | |
| add4 | 4 Bit Adder ( No.1 ) | |
| add4_inst | 4 Bit Adder ( No.2 ) | |
| alu | 4 Bit ALU ( No.1 ) | |
| alu4 | 4 Bit ALU ( No.2 ) | |
| count4 | 4 Bit Binary Counter | |
| dec4 | 4 Bit Decrementer | |
| decimal | 4 Bit Decimal Counter | |
| seven_seg | 7 Segment Decorder | |
| inc4 | 4 Bit Incrementer | |
| pc4 | 4 Bit Program Counter | |
| reg4 | 4 Bit Register | |
| ud_count4 | 4 Bit Up Down Counter | |
This simple computer is for the student experiment in our department. The abstract is Simple Computer Document ( PostScript in Japanese ), and whole of the SFL source is SFL Source of Simple Computer ( tar + gzip ). Here is the uncompressed SFL sources, which are constructed with this simple Computer.
| Module Name | Abstract. |
|---|---|
| system | Whole of Simple Computer |
| inside | FPGA Inside |
| ram | RAM |
| acc | 8 Bit Accumulator |
| alu | 8 Bit ALU |
| pc | 8 Bit Program Counter |
| sp | 8 Bit Stack Pointer |
| inc8 | 8 Bit Incrementer |
| dec8 | 8 Bit Decrementer |
| inc1 | 1 Bit Incrementer |
| fa1 | Full Adder |
| Module Name | Abstract. |
|---|---|
| m8 | A 8 Bit Serial Multiplier |
| add8 | 8 Bit Adder |
| dec4 | 4 Bit Decrimenter |