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Specifies the template to insert into the text file.
| Show syntax of | Indicates the type of templates displayed in the Template section list, that is, AHDL, Quartus® II Tcl, Tcl, Verilog HDL, or VHDL templates. If you save the current file as a Text Design File (.tdf), Verilog Design File (.v), VHDL Design File (.vhd), or Tcl Script File (.tcl), the list has selected AHDL, Verilog HDL, VHDL, or Quartus II Tcl respectively, when you open the Template dialog box (Insert menu). |
| Template section |
Displays the names of one of the following sets of templates, depending on the HDL selected in the Show syntax of list: In the Template section list, you select the template that you want to insert into a file. |
| Preview | Displays the code for the template selected in the Template section list. |
Templates are available for the overall AHDL, VHDL, and Verilog HDL file structures. These templates, each called "Overall Structure," list all AHDL sections and statements, VHDL constructs, or Verilog HDL constructs in separate lines in the order in which they appear in the TDF, VHDL Design File, or Verilog Design File, respectively. The syntax of the AHDL sections and statements, Quartus® II Tcl assignments and settings, Tcl commands and statements, VHDL constructs, or Verilog HDL constructs is not included; you must replace each line with the correct HDL or Tcl syntax for each section you wish to use in your file.
For VHDL Design Files, the Quartus II software provides templates for complete counter,
flipflop, and tri-state buffer designs. For Verilog Design Files, the Quartus II software
provides a template for a complete counter design, as well as templates for the
following logic functions: and, nand, or, nor, xor, xnor, not, and buf.
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