Megafunction

lpm_counter (Counter) Megafunction



Parameterized counter megafunction. The lpm_counter megafunction is a binary counter that features an up, down, or up/down counter with optional synchronous or asynchronous clear, set, and load ports.

Altera® recommends using the lpm_counter function instead of any other type of binary counter.

This topic contains the following information:

 

AHDL Function Prototype (port name and order also apply to Verilog HDL):

FUNCTION lpm_counter (data[LPM_WIDTH-1..0], clock, clk_en, cnt_en, updown, cin,
      aclr, aset, aconst, aload, sclr, sset, sconst, sload)
   WITH (LPM_WIDTH, LPM_DIRECTION, LPM_MODULUS, LPM_AVALUE, LPM_SVALUE, CARRY_CNT_EN, LABWIDE_SCLR)
   RETURNS (q[LPM_WIDTH-1..0], eq[15..0] );

 

VHDL Component Declaration:

COMPONENT lpm_counter
   GENERIC (LPM_WIDTH: POSITIVE;
      LPM_MODULUS: NATURAL := 0;
      LPM_DIRECTION: STRING := "UNUSED";
      LPM_AVALUE: STRING := "UNUSED";
      LPM_SVALUE: STRING := "UNUSED";
      LPM_PVALUE: STRING := "UNUSED";	  
      LPM_TYPE: STRING := "LPM_COUNTER";
      LPM_HINT : STRING := "UNUSED");
   PORT (data: IN STD_LOGIC_VECTOR(LPM_WIDTH-1 DOWNTO 0) := (OTHERS => '0');
      clock: IN STD_LOGIC;
      clk_en, cnt_en, updown: IN STD_LOGIC := '1';
      sload, sset, sclr, aload, aset, aclr, cin: IN STD_LOGIC := '0';
      cout: OUT STD_LOGIC;
      --eq: OUT STD_LOGIC_VECTOR (15 DOWNTO 0);	  
      q: OUT STD_LOGIC_VECTOR(LPM_WIDTH-1 DOWNTO 0));
END COMPONENT;

NOTE Implementation of the lpm_counter function does not include the LPM_PVALUE parameter.

 

VHDL LIBRARY-USE Declaration

LIBRARY lpm;
USE lpm.lpm_components.all;

 

Port Descriptions:

INPUT PORTS

Port Name Required Description Comments
data[] No Parallel data input to the counter. Input port LPM_WIDTH wide. Uses aload or sload.
clock Yes Positive-edge-triggered clock.  
clk_en No Clock enable input. Enables all synchronous activities. Default = 1 (enabled).
cnt_en No Count enable input. Disables the count when low (0) without affecting sload, sset, or sclr. Default = 1 (enabled).
updown No Controls the direction of the count. High (1) = count up. Low (0) = count down. Default = up (1). If the LPM_DIRECTION parameter is used, the updown port cannot be connected. If LPM_DIRECTION is not used, the updown port is optional.
cin No Carry-in to the low-order bit. Default = 1 (VCC). For "up" counters, the behavior of the cin input is identical to the behavior of the cnt_en input.
aclr No Asynchronous clear input. Default = 0 (disabled). If both aset and aclr are used and asserted, aclr overrides aset.
aset No Asynchronous set input. Default = 0 (disabled). Sets q[] outputs to all 1s, or to the value specified by LPM_AVALUE. If both aset and aclr are used and asserted, aclr overrides aset.
aload No Asynchronous load input. Asynchronously loads the counter with the value on the data input. Default = 0 (disabled). If aload is used, data[] must be connected.
sclr No Synchronous clear input. Clears the counter on the next active clock edge. Default = 0 (disabled). If both sset and sclr are used and asserted, sclr overrides sset.
sset No Synchronous set input. Sets the counter on the next active clock edge. Default = 0 (disabled). Sets q outputs to all 1s, or to the LPM_SVALUE value. If both sset and sclr are used and asserted, sclr overrides sset.
sload No Synchronous load input. Loads the counter with data[] on the next active clock edge. Default = 0 (disabled). If sload is used, data[] must be connected.

OUTPUT PORTS

Port Name Required Description Comments
q[] No Data output from the counter. Output port LPM_WIDTH wide. Either q[] or at least one of the eq[15..0] ports must be connected.
eq[15..0] No Counter decode output. Active high when the counter reaches the specified count value. (AHDL only) Either the q[] port or eq[] port must be connected. Up to c eq ports can be used (0 <= c <= 15). Only the 16 lowest count values are decoded. When the count value is c, the eqc output is set high (1). For example, when the count is 0, eq0 = 1, when the count is 1, eq1 = 1 and when the count is 15, eq 15 = 1. Decoded output for count values of 16 or greater require external decoding. The eq[15..0] outputs are asynchronous to the q[] output.
cout No Carry-out of the MSB.  

 

Parameter Descriptions:

Parameter Type Required Description
LPM_WIDTH Integer Yes The number of bits in the count, or the width of the q[] and data[] ports, if they are used.
LPM_DIRECTION String No Values are "UP", "DOWN", and "UNUSED". If the LPM_DIRECTION parameter is used, the updown port cannot be connected. When the updown port is not connected, the default for the LPM_DIRECTION parameter is "UP".
LPM_MODULUS Integer No The maximum count, plus one. Number of unique states in the counter's cycle. If the load value is larger than the LPM_MODULUS parameter, the behavior of the counter is not specified.
LPM_AVALUE Integer / String No Constant value that is loaded when aset is high. If the value specified is larger than <modulus>, the behavior of the counter is an undefined (X) logic level, where <modulus> is LPM_MODULUS, if present, or 2 ^ LPM_WIDTH. Altera recommends that you specify this value as a decimal number for AHDL designs.
LPM_SVALUE Integer / String No Constant value that is loaded on the rising edge of clock when either sset or sconst is high. Must be used if sconst is used. Altera recommends that you specify this value as a decimal number for AHDL designs.
LPM_HINT String No Allows you to specify Altera-specific parameters in VHDL Design Files (.vhd). The default is "UNUSED".
LPM_TYPE String No Identifies the library of parameterized modules (LPM) entity name in VHDL Design Files.
CARRY_CNT_EN String No Altera-specific parameter. Values are "SMART", "ON", "OFF", or "UNUSED". Enables the lpm_counter function to propagate the cnt_en signal through the carry chain. In some cases, the CARRY_CNT_EN parameter setting may have a slight impact on the speed, so you may wish to turn it off. The default value is "SMART", which provides the best trade-off between size and speed.
LABWIDE_SCLR String No Altera-specific parameter. Values are "ON", "OFF", or "UNUSED". The default value is "ON". Allows you to disable the use of the LAB-wide sclr feature found in ACEX® 1K, APEX 20K, APEX II, ARM®-based Excalibur, FLEX® 6000, FLEX 10KE, and Mercury devices. Turning this option off increases the chances of fully using the partially filled LABs, and thus may allow higher logic density when SCLR does not apply to a complete LAB. This parameter is available for backward compatibility and Altera recommends that you not use this parameter.

 

Truth Table/Functionality:

Inputs Outputs Function
aclr aset aload clk_en clock sclr sset sload cnt_en updown q[LPM_WIDTH-1..0]  
1 x x x x x x x x x 000...  
0 1 x x x x x x x x 111...  
0 1 x x x x x x x x LPM_AVALUE Asynchronous set to value specified for LPM_AVALUE
0 0 1 x x x x x x x data[] Asynchronous load from data[] input
0 0 0 0 x x x x x x q[] Hold current count value
0 0 0 1 Rising Edge 1 x x x x 000... Synchronous clear
0 0 0 1 Rising Edge 0 1 x x x 111... Synchronous set
0 0 0 1 Rising Edge 0 1 x x x LPM_SVALUE Synchronous set to value specified for LPM_SVALUE
0 0 0 1 Rising Edge 0 0 0 0 0 q[] Hold current count value
0 0 0 1 Rising Edge 0 0 1 x x data[] Synchronous load from data[] input
0 0 0 1 Rising Edge 0 0 0 1 1 q[]+1 Count up
0 0 0 1 Rising Edge 0 0 0 1 0 q[]-1 Count down

 

Typical Implementation:

The lpm_counter function offers four different modes that allow you to force the count value to a specific number. You can use each of the modes either synchronously (port names starting with an "s") or asynchronously (port names starting with an "a"). You can also combine the modes.

Mode: Description:
Setting (forcing to all 1s) Asserting the sset or aset signal forces the count value to all 1s.
Clearing (setting to all 0s) Asserting the sclr or aclr pin forces the count value to all 0s.
Loading (from data bus) Asserting the aload or sload signal loads the count value from the data input.
Loading (to a predetermined value) Asserting the sset or aset signal loads the count value to the number specified by the LPM_SVALUE or LPM_AVALUE parameter, respectively.

 

Resource Usage:

The following table summarizes the resource usage for an lpm_counter function used to implement a 16-bit counter with an up/down control, a count enable input, a synchronous load input, and an asynchronous clear input. Logic cell usage scales linearly in proportion to counter width.

Design Goals Design Results
Device Family Optimization
APEX 20K Routability
  Speed (default)
Width Logic Cells
16 46
16 17

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