Actel's ProASIC®3L Family Balances Low Power, Speed, and Low Cost
Dramatically reduced power consumption with up to 350 MHz operation
As geometries shrink and focus on power budgets becomes increasingly important, designers are turning to vendors for low-power solutions. Featuring 40 percent lower dynamic power and 90 percent lower static power than its previous-generation ProASIC3 FPGAs, and orders of magnitude lower power than SRAM competitors, the new flash family combines dramatically reduced power consumption with up to 350 MHz operation. As a result, designers in high-performance market segments, such as industrial, medical, and scientific, now have access to flexible, feature-rich solutions that offer speed, low power, and low cost. The ProASIC3L family also supports the free implementation of an FPGA-optimized, 32-bit ARM® Cortex™-M1 processor, allowing system designers to select the Actel flash FPGA solution that best meets their speed and power design requirements, regardless of application or volume. Combined with optimized software tools that use Power-Driven Layout (PDL), this provides instant power reduction capabilities.
ProASIC3L devices incorporate proven Flash*Freeze technology, which allows fast switching (within 1 µs) from an active to a static state. No additional components are required to switch from or to these states, thereby eliminating the need for additional I/Os and clock management circuits. This capability makes dynamic power reduction possible by quickly switching the device in and out of Flash*Freeze mode during periods of inactivity. A ProASIC3L device can operate from a single voltage (from 1.2 V to 1.5 V) and offers secure in-system programming (ISP) for field programming upgrades.
The ProASIC3L family supports up to 3 million system gates with advanced I/O options, user nonvolatile memory, Level 0 live-at-power-up (LAPU) support, and the industry's most secured AES encryption capability.