describe

The describe command displays information about the specified HDL item. The description is displayed in the Main window. The following kinds of items can be described:

• VHDL
  signals, variables, and constants
• Verilog 
  nets and registers

All but VHDL variables and constants may be specified as hierarchical names. VHDL variables and constants can be described only when visible from the current process that is either selected in the Process window or is the currently executing process (at a breakpoint for example).

Syntax

describe

<name>

Arguments

<name>

Specifies the name of an HDL item. Wildcards are accepted. Required.

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