mti_CreateRealType()

Creates a real type.

Syntax

type_id = mti_CreateRealType() 

Returns

Name	Type	Description
type_id	mtiTypeIdT	A handle to the new real type

Arguments

None

Description

mti_CreateRealType() creates a new type ID that describes a VHDL real type.

Related functions

mti_CreateArrayType()

mti_CreateEnumType()

mti_CreateScalarType()

mti_CreateTimeType()

Example

FLI code

#include <stdlib.h>
#include <mti.h>

typedef struct {
  mtiSignalIdT sigid;
  mtiDriverIdT drvid;
} instanceInfoT;

void driveSignal( void * param )
{
  char          * region_name;
  instanceInfoT * inst = (instanceInfoT*)param;
  double          sigval;

  (void)mti_GetSignalValueIndirect( inst->sigid, &sigval );
  region_name = mti_GetRegionFullName( mti_GetSignalRegion( inst->sigid ) );

  mti_PrintFormatted( "Time [%d,%d] delta %d: Signal %s/%s is %g\n",
                     mti_NowUpper(), mti_Now(), mti_Delta(),
                     region_name, mti_GetSignalName( inst->sigid), sigval );

  sigval = sigval + 1.5;
  mti_ScheduleDriver( inst->drvid, (long)&sigval, 5, MTI_INERTIAL );

  mti_VsimFree( region_name );
}

void cleanupCallback( void * param )
{
  mti_PrintMessage( "Cleaning up...\n" );
  free( param );
}

void initForeign(
  mtiRegionIdT       region,   /* The ID of the region in which this     */
                               /* foreign architecture is instantiated.  */
  char              *param,    /* The last part of the string in the     */
                               /* foreign attribute.                     */
  mtiInterfaceListT *generics, /* A list of generics for the foreign model.*/
  mtiInterfaceListT *ports     /* A list of ports for the foreign model.   */
)
{
  instanceInfoT * inst;
  mtiProcessIdT   procid;
  mtiTypeIdT      real_type;

  inst        = (instanceInfoT *)malloc( sizeof(instanceInfoT) );
  real_type   = mti_CreateRealType();
  inst->sigid = mti_CreateSignal( "mySig", region, real_type );
  inst->drvid = mti_CreateDriver( inst->sigid );
  procid      = mti_CreateProcess( "mySigDriver", driveSignal, inst );
  mti_Sensitize( procid, inst->sigid, MTI_EVENT );
  mti_ScheduleWakeup( procid, 0 );
  mti_SetDriverOwner( inst->drvid, procid );
  mti_AddQuitCB( cleanupCallback, inst );
  mti_AddRestartCB( cleanupCallback, inst );
} 

HDL code

entity top is
end top;

architecture a of top is
  signal s1 : bit := '0';
begin
  s1 <= not s1 after 5 ns;
end a; 

Simulation output

% vsim -c top -foreign "initForeign for_model.sl"
Reading .../modeltech/sunos5/../tcl/vsim/pref.tcl 

# 5.4b

# vsim -foreign {initForeign for_model.sl} -c top 
# Loading .../modeltech/sunos5/../std.standard
# Loading work.top(a)
# Loading ./for_model.sl
VSIM 1> run 50
# Time [0,0] delta 1: Signal /top/mysig is 0
# Time [0,5] delta 0: Signal /top/mysig is 1.5
# Time [0,10] delta 0: Signal /top/mysig is 3
# Time [0,15] delta 0: Signal /top/mysig is 4.5
# Time [0,20] delta 0: Signal /top/mysig is 6
# Time [0,25] delta 0: Signal /top/mysig is 7.5
# Time [0,30] delta 0: Signal /top/mysig is 9
# Time [0,35] delta 0: Signal /top/mysig is 10.5
# Time [0,40] delta 0: Signal /top/mysig is 12
# Time [0,45] delta 0: Signal /top/mysig is 13.5
# Time [0,50] delta 0: Signal /top/mysig is 15
VSIM 2> quit
# Cleaning up... 

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