Extending Shared Bus Cache Coherency

• What is the key fact that makes shared bus Cache Coherency work?

  • SNOOPING! Processors can see ALL transactions that occur over the shared bus

• How do we maintain Cache Coherency in a system in which all transactions are not visible?

  • Necessary if we are going to build a scalable system that maintains cache coherency - the single shared bus will run out of bandwidth after about 8 processors or so
  • Goal is a scalable shared memory multiprocessor that supports coherent caches

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