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Allows you to specify an uPCore Transaction Model Input File (.mbus_in) for use in simulating bus transactions between an embedded processor core and the remainder of the device. If you specify an uPCore Transaction Model Input File in the uPCore Transaction Model File Name box, you must specify the file name only, without the file extension. The Simulator searches for any other files that may exist for a bus transaction simulation, which include uPCore Transaction Model Slave Configuration File (cfg.sbus_in) and uPCore Transaction Model Slave Input Files (.sbus_in) with the same file name, and automatically adds the appropriate file extensions during simulation.
If the current design contains an embedded processor core and you do not specify an uPCore Transaction Model Input File in the uPCore Transaction Model File Name box, the Simulator looks for an uPCore Transaction Model Input File with the same name as the SOURCE
parameter for the embedded processor core megafunction. If the SOURCE
parameter is not set, the Simulator looks for an uPCore Transaction Model Input File with the same name as the current project. If the Simulator cannot find any uPCore Transaction Model Input File, it assumes that the embedded processor core issues idle instructions during simulation (that is, no reads or writes are requested).
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