Glossary

uPCore Transaction Model Slave Configuration File (.cfg.sbus_in)


An ASCII text file (with the extension cfg.sbus_in) for use in simulating bus transactions between the embedded processor core and the PLD in an ARM®-based Excalibur device. This file specifies the start and end addresses and number of wait states for the six memory banks in the Excalibur embedded processor stripe, whose initial contents are contained in the corresponding uPCore Transaction Model Slave Input Files (.sbus_in) for the project. The addresses of the memory banks in the memory space of the stripe must not overlap and the memory bank start addresses must be word-aligned.

The memory spaces, as defined in the uPCore Transaction Model Slave Configuration File and corresponding uPCore Transaction Model Slave Input Files, are designed to simulate the bus transactions between the PLD and stripe memory (SDRAM Interface, Expansion Bus Interface, UART Interface, and so on).

To create an uPCore Transaction Model Slave Configuration File, you must create a text file that specifies the start addresses, end addresses, and number of wait states between first access to the memory bank and subsequent burst access, and save it in the project directory, in the format <file name>.cfg.sbus_in. The value of wait states is not supported in version 1.1 of the Quartus® II software. The variable <file name> must match the file name of the uPCore Transaction Model Input File (.mbus_in), uPCore Transaction Model Slave Configuration File, and uPCore Transaction Model Slave Input Files (.sbus_in). You specify a single file name of these files (i.e. without the file extension) in the uPCore Transaction Model File Name box, which is available from the Options page of the Settings dialog box (Assignments menu).

Only one uPCore Transaction Model Slave Configuration File should exist for each ARM-based Excalibur project. If you do not create an uPCore Transaction Model Slave Configuration File for the project, the memory spaces are initialized to zero, and the transactions to the Stripe Slave-Port from the PLD are written to the uPCore Transaction Model Output File (.mbus_out), but any return information from the memory banks in the stripe is set to zero.

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