Simulate Mode

Creating uPCore Transaction Model Slave Input Files



You create an uPCore Transaction Model Slave Input File (.sbus_in) by creating a text file that specifies the initial contents of a memory bank in the stripe that is accessed by the PLD through the Stripe Slave-Port. These memory banks can be used to simulate the bus transactions between the PLD and stripe memory (SDRAM Interface, Expansion Bus Interface, UART Interface, and so on). You must save it in the project directory with the format <file name>.<bank number>.sbus_in.

The uPCore Transaction Model Slave Input File must conform to the following command syntax:

Hexadecimal Digit(s) Hexadecimal Digit Use Syntax
0 - 8 Initial memory value <memory value>

You may also include comments in the syntax. The following example shows an excerpt of a sample file that includes comments, preceded by two slashes (//):

00000001	// addr=@00
00000002	// addr=@04
00000003
00000004
00000005
00000006
00000007
00000064
00000065

 

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