See Also

Displays information about what device resources are used for LAB external interconnects (that is, the local lines, which are located in the local interconnect region and are driven by signals transferred between logic elements located in non-adjacent LABs).

If you are using an APEX^™ 20K, APEX^™ II, or ARM^®-based Excalibur^™ device, the section displays a bar chart showing the number of MegaLAB^™ structures that contain a specific number of LAB external interconnects.

If you are using a FLEX^® 6000 device, the section displays a bar chart showing the number of local interconnect regions that contain a specific number of LAB external interconnects.

If you are using an ACEX^® 1K, FLEX 10KE, MAX^® 3000, or MAX 7000 device, the section displays a bar graph showing the number of LABs that contain a specific number of LAB external interconnects.

If you are using a Mercury^™ device, the section displays a bar chart showing the number of LAB rows that contain a specific number of LAB external interconnects.

The following example shows the LAB External Interconnect section generated for a sample design in an APEX 20K device:

The following example shows the LAB External Interconnect section generated for a sample design in a FLEX 6000 device:

The following example shows the LAB External Interconnect section generated for a sample design in a FLEX 10KE device.

The following example shows the LAB External Interconnect section generated for a sample design in a Mercury device:

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