See Also

Parameterized latch megafunction. Altera^® recommends that you use the lpm_latch function only if the aset port is needed; otherwise, you should use the LATCH primitive rather than lpm_latch for easier implementation and improved compilation time.

Altera also recommends instantiating this function as described in Using the MegaWizard^® Plug-In Manager.

This topic contains the following information:

• AHDL Function Prototype (also applies to Verilog HDL)
• VHDL Component Declaration
• VHDL LIBRARY-USE Declaration (not required if the VHDL Component Declaration is used)
• Port Descriptions
• Parameter Descriptions
• Truth Table/Functionality
• Resource Usage

FUNCTION lpm_latch (data[LPM_WIDTH-1..0], gate, aclr, aset, aconst)
   WITH (LPM_WIDTH, LPM_AVALUE)
   RETURNS (q[LPM_WIDTH-1..0]);

The aconst port is provided only for backward compatibility, but should be left unconnected in newer projects.

COMPONENT lpm_latch
   GENERIC (LPM_WIDTH: POSITIVE;
      LPM_AVALUE: STRING := "UNUSED";
      LPM_PVALUE: STRING := "UNUSED";
      LPM_TYPE: STRING := "LPM_LATCH";
      LPM_HINT: STRING := "UNUSED");
   PORT (data: IN STD_LOGIC_VECTOR(LPM_WIDTH-1 DOWNTO 0);
      gate: IN STD_LOGIC;
      aclr, aset: IN STD_LOGIC := '0';
      q: OUT STD_LOGIC_VECTOR(LPM_WIDTH-1 DOWNTO 0));
END COMPONENT;

LIBRARY lpm;
USE lpm.lpm_components.all;

INPUT PORTS

OUTPUT PORTS

Uses a single logic cell per bit.

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