Allows you to change the setup relationship of all enable-driven registers of the assigned pin or register by specifying the maximum number of source clock cycles required before the enable-driven register latches a value. In other words, the Enable Source Multicycle assignment allows you to assign a Source Multicycle value to all enable-driven registers directly fed by the assigned register or pin.
For example, assigning an Enable Source Multicycle value of 2 to a register or pin overrides the setup relationship by delaying the latch edge by one clock cycle on every enable-driven register of the assigned register or pin, as shown in the following illustration:
Similarly, assigning a point-to-point Enable Source Multicycle affects all register to register paths in which the source and destination registers directly feed an enable-driven register, as shown in the following illustration:
The following table prioritizes each legal assignment type, and shows which paths are affected when assigned. Priority 1 assignments take precedence over priority 2 assignments, and so on. Within a priority level, the most stringent requirement takes precedence. Specifying a point-to-point Enable Source Multicycle assignment may increase the time necessary for timing-driven compilation.
Priority Level | Assignment Type/Location | Affected Path(s) |
---|---|---|
1 |
Point-to-point assignment from register to register. Point-to-point assignment from input or bidirectional pin to register. Point-to-point assignment from pin to pin. |
All register to register paths in which the source and destination registers directly feed an enable-driven register. |
2 | Single-point assignment to any register. | All enable-driven registers directly fed by the assigned register or pin. |
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