Allows you to change the setup relationship of all enable-driven registers of the assigned pin or register by specifying the number of clock cycles required before the enable-driven register latches a value. In other words, the Enable Multicycle assignment allows you to assign a Multicycle value to all enable-driven registers directly fed by the assigned register or pin.

For example, assigning an Enable Multicycle value of 2 to a single register or pin overrides the setup relationship by delaying the latch edge by one clock cycle on every enable-driven register of the assigned register or pin, as shown in the following illustration:

Similarly, assigning a point-to-point Enable Multicycle affects all register to register paths in which the source and destination registers directly feed an enable-driven register, as shown in the following illustration:

The following table prioritizes each legal assignment type, and shows which paths are affected when assigned. Priority 1 assignments take precedence over priority 2 assignments, and so on. Within a priority level, the most stringent requirement takes precedence. Specifying a point-to-point Enable Multicycle assignment may increase the time necessary for timing-driven compilation.