EDA Interfaces

Example of Performing a Functional Simulation of a Verilog HDL Design with a Custom Megafunction Variation with the ModelSim Software



You can perform a functional simulation of the custom megafunction variation you created in Example of Creating a "black box" for a Verilog HDL Custom Variation of a Megafunction before compilation in the LeonardoSpectrum or the Quartus® II software.

You can create a script file that performs the following steps:

  1. Compiles the altera_mf.v library.

  2. Compiles the Verilog Design File (.v) generated by the MegaWizard® Plug-In Manager. In this example, the file is cam_wrapper_v.v.

  3. Compiles the top-level Verilog Design File with the ModelSim® software. In this example, the file is camsource.v.

  4. Compiles the test bench and memory initialization files. In this example, the test bench file name is cam_wrapper_test.v and the memory initialization file names are my_cam.hex and my_cam_xu.hex.

You can simulate this sample design in the ModelSim software by using the commands shown in the following sample.

vlib work					# Create working directory
vlog /quartus/eda/sim_lib/220model.v		# Compile the lpm library
vlog /quartus/eda/sim_lib/altera_mf.v		# Compile the altera_mf library
exec vmap lpm work				# Create lpm library and map it to work
exec vmap altera_mf work			# Create altera_mf library and map it to work
vlog cam_wrapper_v.v				# Compile Megawizard generated file
vlog camsource.v				# Compile source instantiating module
vlog cam_wrapper_test.v				# Compile test fixture
vsim -t ns cam_wrapper_test			# Simulate cam_wrapper_test with
						# resolution in ns
view wave
add wave /*
run 10000 ns


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