See Also

The following example procedure illustrates how to use the MegaWizard^® Plug-In Manager to create a custom megafunction variation of the altcam function. You can follow similar steps to create custom megafunction variations of other megafunctions. To create a custom megafunction variation of the altcam function:

1. Choose MegaWizard Plug-In Manager (Tools menu).

2. In the MegaWizard Plug-In Manager, when you are asked Which action do you want to perform?, select Create a new custom megafunction variation and click Next.

3. When you are asked Which type of output file do you want to create?, select Verilog HDL .

4. In the Available Megafunctions list, click on the + icon to expand the storage folder and select ALT_CAM.

5. When you are asked What name do you want for the file?, type in the appropriate file name or click Browse (...) to select the appropriate location. For this example, the path and file name should be  C:\apexels\cam_wrapper_v.v.

6. Click Next.

7. To specify the size and operation mode of the CAM function:

1. When you are asked How wide should the 'data' input bus be?, select 32 bits.

2. Under Please specify the width of the CAM, select by the width of the 'address' input and select 5 bits.

3. When you are asked What is the operation mode of the CAM?, select Single match.

8. Click Next.

9. To specify the optional input and output ports:

1. When you are asked Which optional input ports do you want to use?, turn on 'wrx[]', 'wrxused' and 'wrdelete'.

2. When you are asked Which output ports do you want to use?, turn on 'maddress[]', 'mfound' and 'mcount[]'.

10. Click Next.

11. To register the input and output ports and create asynchronous clear and clock enable signals:

1. When you are asked Do you want to register the outputs?, select No.

2. When you are asked Which input ports should be registered?, turn on 'pattern port' and 'wrx' ["Don't care" pattern mask] port.

3. Turn on Create an 'aclr' asynchronous clear for the registered ports.

4. Turn on Create one clock enable signal for each clock signal.

5. To specify Which registered ports should be affected by the 'aclr' port, click on More Options.

12. Click Next.

13. To specify a Hexadecimal (Intel-Format) File (.hex) to initialize the contents of the CAM:

1. When you are asked Do you want to specify the initial contents of the CAM?, select Yes.

2. In the File name box, type in the appropriate file name or click Browse (...) to select the appropriate location. For this example, the file name should be my_cam.hex.

   If you use a "don't care" initialization, the file name must be <file name>_xu.hex.

14. Click Next.

15. The Summary page indicates the files that the MegaWizard Plug-In Manager will create based on your specifications. In this example, it generates the following files:

C:\apexels\cam_wrapper_v.v
C:\apexels\cam_wrapper_v.inc
C:\apexels\cam_wrapper_v.cmp
C:\apexels\cam_wrapper_v.bsf
C:\apexels\cam_wrapper_bb.v
C:\apexels\cam_wrapper_inst.v

For a sample output of the resulting design file, see Example of a Verilog HDL Custom Megafunction Variation of altcam.

16. To close the MegaWizard Plug-In Manager, click Finish.

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