Options

Specifies which of the following options you want to implement for the current target device.

For information on an option, you can also select the option in the Options list and read the description for the option in the Description box.

Auto-restart configuration after error
Directs the device to restart the configuration process automatically if a data error is encountered. If this option is turned off, you must externally direct the device to restart the configuration process if an error occurs.

This option is available only in the Passive Serial configuration scheme.

Release clears before tri-states
Directs the device to release the clear signal on registered logic cells and I/O cells before releasing the output enable override on tri-state buffers. If this option is turned off, the output enable signals are released before the clear overrides are released.

Enable user-supplied start-up clock (CLKUSR)
Directs the device to use a user-supplied clock on the CLKUSR pin for initialization. When turned off, external circuitry is required to provide the initialization clock on the DCLK pin in the Passive Serial and Passive Parallel Synchronous configuration schemes; in the Passive Parallel Asynchronous configuration scheme, the device uses an internal initialization clock.

Enable device-wide reset (DEV_CLRn)
Enables the DEV_CLRn pin, which allows all registers of the device to be reset by an external source. If this option is turned off, the DEV_CLRn pin is disabled when the device operates in user mode and is available as a user I/O pin.

Enable device-wide output enable (DEV_OE)
Enables the DEV_OE pin when the device is in user mode. If this option is turned on, all outputs on the chip operate normally. When the pin is disabled, all outputs are tri-stated. If this option is turned off, the DEV_OE pin is disabled when the device operates in user mode and is available as a user I/O pin.

Enable INIT_DONE output Enables the INIT_DONE pin, which allows you to externally monitor when initialization is complete and the device is in user mode. If this option is turned off, the INIT_DONE pin is disabled when the device operates in user mode and is available as a user I/O pin.

Enable JTAG BST Support
Enables JTAG BST support.

This option is available only for FLEX^® 6000, MAX^® 3000, and MAX 7000 devices.

Enable LOCK output
Enables the LOCK output, which is available in devices with ClockLock^® phase-locked loop (PLL) circuitry. The LOCK output monitors when the digital phase detector locks the input signal. The Enable LOCK output option is provided primarily for backward compatibility with MAX+PLUS^® II designs. Altera^® recommends using the MegaWizard^® Plug-In Manager (Tools menu) to instantiate PLLs and to enable the LOCK output in new designs. This option is ignored if it is assigned to a device that does not have the PLL feature.

This option is available only for ACEX^® 1K and FLEX 10KE devices.

Enable security bit support Enables the security bit support, which prevents a device from being examined and reprogrammed. This option is available for MAX 3000 and MAX 7000 devices only.

Enable VREF A pin Enables the VREFA pin. This option is available for MAX 7000B devices only.

Enable VREF B pin Enables the VREFB pin. This option is available for MAX 7000B devices only.

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Auto-restart configuration after error	Directs the device to restart the configuration process automatically if a data error is encountered. If this option is turned off, you must externally direct the device to restart the configuration process if an error occurs. This option is available only in the Passive Serial configuration scheme.
Release clears before tri-states	Directs the device to release the clear signal on registered logic cells and I/O cells before releasing the output enable override on tri-state buffers. If this option is turned off, the output enable signals are released before the clear overrides are released.
Enable user-supplied start-up clock (CLKUSR)	Directs the device to use a user-supplied clock on the `CLKUSR` pin for initialization. When turned off, external circuitry is required to provide the initialization clock on the `DCLK` pin in the Passive Serial and Passive Parallel Synchronous configuration schemes; in the Passive Parallel Asynchronous configuration scheme, the device uses an internal initialization clock.
Enable device-wide reset (DEV_CLRn)	Enables the `DEV_CLRn` pin, which allows all registers of the device to be reset by an external source. If this option is turned off, the `DEV_CLRn` pin is disabled when the device operates in user mode and is available as a user I/O pin.
Enable device-wide output enable (DEV_OE)	Enables the `DEV_OE` pin when the device is in user mode. If this option is turned on, all outputs on the chip operate normally. When the pin is disabled, all outputs are tri-stated. If this option is turned off, the `DEV_OE` pin is disabled when the device operates in user mode and is available as a user I/O pin.
Enable INIT_DONE output	Enables the `INIT_DONE` pin, which allows you to externally monitor when initialization is complete and the device is in user mode. If this option is turned off, the `INIT_DONE` pin is disabled when the device operates in user mode and is available as a user I/O pin.
Enable JTAG BST Support	Enables JTAG BST support. This option is available only for FLEX^® 6000, MAX^® 3000, and MAX 7000 devices.
Enable LOCK output	Enables the `LOCK` output, which is available in devices with ClockLock^® phase-locked loop (PLL) circuitry. The `LOCK` output monitors when the digital phase detector locks the input signal. The Enable LOCK output option is provided primarily for backward compatibility with MAX+PLUS^® II designs. Altera^® recommends using the MegaWizard^® Plug-In Manager (Tools menu) to instantiate PLLs and to enable the `LOCK` output in new designs. This option is ignored if it is assigned to a device that does not have the PLL feature. This option is available only for ACEX^® 1K and FLEX 10KE devices.
Enable security bit support	Enables the security bit support, which prevents a device from being examined and reprogrammed. This option is available for MAX 3000 and MAX 7000 devices only.
Enable VREF A pin	Enables the `VREFA` pin. This option is available for MAX 7000B devices only.
Enable VREF B pin	Enables the `VREFB` pin. This option is available for MAX 7000B devices only.