AHDL

State Machine Declaration



You create a state machine by declaring the name of the state machine, its states, and, optionally, its bits in the Variable Section.

The following example shows a State Machine Declaration:

VARIABLE
   ss :   MACHINE 
          OF BITS (q1, q2, q3)
          WITH STATES ( 
            s1 = B"000",
            s2 = B"010",
            s3 = B"111");

The state machine name is ss. The state bits q1, q2, and q3 are outputs of registers for this machine. The states of this state machine are s1, s2, and s3, each of which is assigned a numerical state value for the state bits q1, q2, and q3.


A State Machine Declaration has the following characteristics:

NOTE Each state of a state machine is represented by a unique pattern of high and low register output signals. The state bits are the registers required by the machine to store the states. The number of states has the following relationship to the number of state bits in a state machine:

<number of states> <= 2^<number of state bits>


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