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You create a state machine by declaring the name of the state machine, its states, and, optionally, its bits in the Variable Section.
The following example shows a State Machine Declaration:
VARIABLE ss : MACHINE OF BITS (q1, q2, q3) WITH STATES ( s1 = B"000", s2 = B"010", s3 = B"111");
The state machine name is ss
. The state bits q1
, q2
, and q3
are outputs of registers for this machine. The states of this state machine are s1
, s2
, and s3
, each of which is assigned a numerical state value for the state bits q1
, q2
, and q3
.
A State Machine Declaration has the following characteristics:
The state machine name is a symbolic name.
In the example shown above, the state machine name is ss
.
The state machine name is followed by a colon (:
) and the keyword
MACHINE
.
The State Machine Declaration must include a list of states, and can include a list of state bit names.
Optional state bits are specified with the keywords OF BITS
,
followed by a comma-separated list of symbolic names; the list must be enclosed
in parentheses ()
. The example shown above specifies the state
bits q1
, q2
, and q3
.
States are specified by the keywords WITH STATES
, followed
by a comma-separated list of symbolic names; the list must also be enclosed
in parentheses. The example shown above specifies the states s1
,
s2
, and s3
.
The first state listed in the WITH STATES
clause is the reset
state for the state machine.
The state names may be optionally assigned to a value with an equals symbol
(=
) followed by a numerical value. In the example shown above,
s1
is assigned to B"000"
, s2
is assigned to B"010"
, and s3
is assigned
to B"111"
.
The State Machine Declaration ends with a semicolon (;
).
Each state of a state machine is represented by a unique pattern of high and low register output signals. The state bits are the registers required by the machine to store the states. The number of states has the following relationship to the number of state bits in a state machine:
<number of states> <= 2^<number of state bits> |
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