This web site provides relevant materials for the RTL Hardware Design Using VHDL: Coding for Efficiency, Portability, and Salability text.  The effort is partially supported by Grant #0126752 from the National Science Foundation. 

• Sample Materials
  (The materials are copyrighted by John, Wiley & Sons and cannot be printed or reposted on web)
• Book highlight (book back cover)
  
• Preface and Table of Contents
• Sample chapter: Finite State Machine: Principle and Practice
  
  
• Code listing
  • File download (rar)
    
    
• Errata
  • Last updated in December, 2006
  • File download (pdf)
    

• Lecture slides
  • Chapter 01 (pdf,  pdf-6)
  • Chapter 02 (pdf,  pdf-6)
  • Chapter 03 (pdf,  pdf-6)
  • Chapter 04 (pdf,  pdf-6)
  • Chapter 05 (pdf,  pdf-6)
  • Chapter 06 (pdf,  pdf-6)
  • Chapter 07 (pdf,  pdf-6)
  • Chapter 08 (pdf,  pdf-6)
  • Chapter 09 (pdf,  pdf-6)
  • Chapter 10 (pdf,  pdf-6)
  • Chapter 11 (pdf,  pdf-6)
  • Chapter 12 (pdf,  pdf-6)
  • Chapter 13 (pdf,  pdf-6)
  • Chapter 16 (pdf,  pdf-6)
    
    
• Lecture slides in Power Point format (zip)

• Solutions to selected problems
  The files are password protected.  If you are the course instructor, please send Dr. Chu an e-mail with web link that can verify your status. 
  • Chapter 02 (pdf)
  • Chapter 03 (pdf)
  • Chapter 04 (pdf)
  • Chapter 05 (pdf)
  • Chapter 06 (pdf)
  • Chapter 07 (pdf)
  • Chapter 08 (pdf)
  • Chapter 09 (pdf)
  • Chapter 10 (pdf)
  • Chapter 11 (pdf)
  
  
• Text fIgures and tables
  The file is password protected.  If you are the course instructor, please send Dr. Chu an e-mail with web link that can verify your status. 
  • To select and copy a figure, use the "Snapshot tool" in Acrobat reader (select "Tools" menu then "Basic" or click the camera-like icon)
  • FIle download (pdf)