Setting Compare Options
Selecting Compare > Options in either the Main or Wave windows provides access to the Add Signal Options dialog box. This dialog is divided into two tabs - the General Options tab and the Comparison Method tab.
- General Options
Comparison Limit Count -- Allows you to limit the waveform comparison to a specific number of total differences and/or a specific number of differences per signal.
VHDL Matching -- Allows you to designate which VHDL signal values will match the VHDL X and Z values.
Verilog Matching -- Allows you to designate which Verilog signal values will match the Verilog X and Z values. It also allows you to ignore the strength of the Verilog signal and consider only logic values.
Save as Default - Allows you to save all changes as the new default settings for subsequent waveform comparisons.
Reset to Default - Resets all settings to original default values.
Automatically add comparisons to the wave window?- Specifies whether new signal comparison objects are added automatically to the Wave window.
- Comparison Method
Clocked (Strobed) Comparison - Allows you to select a default reference clock signal via a selection history or a browse button.
Continuous Comparison - Allows you to set leading and trailing edge tolerances for the waveform comparison. The leading edge tolerance specifies how much earlier the test signal edge may occur before the reference signal edge. The trailing edge tolerance specifies how much later the test signal edge may occur after the reference signal edge. The default value for both tolerances is zero.
Specify When Expression - Allows you to specify a when expression that must evaluate to "true" or 1 at the signal edge for the clock to become effective. Clicking the Builder button will give you access to "The GUI Expression Builder" .
Save as Default - Allows you to save all changes as the new default settings for subsequent waveform comparisons.
Reset to Default - Resets all settings to original default values.
