Creating foreign architectures with sm_entity

The ModelSim sm_entity tool automatically creates entities and foreign architectures for SmartModels. Its usage is as follows:

Syntax

sm_entity

[-] [-xe] [-xa] [-c] [-all] [-v] [-93] [<SmartModelName>...]

Arguments

-

Read SmartModel names from standard input.

-xe

Do not generate entity declarations.

-xa

Do not generate architecture bodies.

-c

Generate component declarations.

-all

Select all models installed in the SmartModel library.

-v

Display progress messages.

-93

Use extended identifiers where needed.

<SmartModelName>

Name of a SmartModel (see the SmartModel library documentation for details on SmartModel names).

By default, the sm_entity tool writes an entity and foreign architecture to stdout for each SmartModel name listed on the command line. Optionally, you can include the component declaration (-c), exclude the entity (-xe), and exclude the architecture (-xa).

The simplest way to prepare SmartModels for use with ModelSim VHDL is to generate the entities and foreign architectures for all installed SmartModels, and compile them into a library named lmc. This is easily accomplished with the following commands:

% sm_entity -all > sml.vhd
% vlib lmc
% vcom -work lmc sml.vhd 

To instantiate the SmartModels in your VHDL design, you also need to generate component declarations for the SmartModels. Add these component declarations to a package named sml (for example), and compile the package into the lmc library:

% sm_entity -all -c -xe -xa > smlcomp.vhd 

Edit the resulting smlcomp.vhd file to turn it into a package of SmartModel component declarations as follows:

library ieee;
use ieee.std_logic_1164.all;
package sml is
	<component declarations go here>
end sml; 

Compile the package into the lmc library:

% vcom -work lmc smlcomp.vhd 

The SmartModels can now be referenced in your design by adding the following library and use clauses to your code:

library lmc;
use lmc.sml.all; 

The following is an example of an entity and foreign architecture created by sm_entity for the cy7c285 SmartModel.

library ieee;
use ieee.std_logic_1164.all;

entity cy7c285 is
	generic (TimingVersion : STRING := "CY7C285-65";
		DelayRange : STRING := "Max";
		MemoryFile : STRING := "memory" );
	port ( A0 : in std_logic;
		A1 : in std_logic;
		A2 : in std_logic;
		A3 : in std_logic;
		A4 : in std_logic;
		A5 : in std_logic;
		A6 : in std_logic;
		A7 : in std_logic;
		A8 : in std_logic;
		A9 : in std_logic;
		A10 : in std_logic;
		A11 : in std_logic;
		A12 : in std_logic;
		A13 : in std_logic;
		A14 : in std_logic;
		A15 : in std_logic;
		CS : in std_logic;
		O0 : out std_logic;
		O1 : out std_logic;
		O2 : out std_logic;
		O3 : out std_logic;
		O4 : out std_logic;
		O5 : out std_logic;
		O6 : out std_logic;
		O7 : out std_logic;
		WAIT_PORT : inout std_logic );
end; 
architecture SmartModel of cy7c285 is
	attribute FOREIGN : STRING;
	attribute FOREIGN of SmartModel : architecture is 
		"sm_init $MODEL_TECH/libsm.sl ; cy7c285";
begin
end SmartModel; 

Entity details

• The entity name is the SmartModel name (you can manually change this name if you like).
• The port names are the same as the SmartModel port names (these names must not be changed). If the SmartModel port name is not a valid VHDL identifier, then sm_entity automatically converts it to a valid name. If sm_entity is invoked with the -93 option, then the identifier is converted to an extended identifier, and the resulting entity must also be compiled with the -93 option. If the -93 option had been specified in the example above, then WAIT would have been converted to \WAIT\. Note that in this example the port WAIT was converted to WAIT_PORT because wait is a VHDL reserved word.
• The port types are std_logic. This data type supports the full range of SmartModel logic states.
• The DelayRange, TimingVersion, and MemoryFile generics represent the SmartModel attributes of the same name. Consult your SmartModel library documentation for a description of these attributes (and others). Sm_entity creates a generic for each attribute of the particular SmartModel. The default generic value is the default attribute value that the SmartModel has supplied to sm_entity.

Architecture details

• The first part of the foreign attribute string (sm_init) is the same for all SmartModels.
• The second part ($MODEL_TECH/libsm.sl) is taken from the libsm entry in the initialization file, modelsim.ini.
• The third part (cy7c285) is the SmartModel name. This name correlates the architecture with the SmartModel at elaboration.

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